DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. Applicant’s amendments, filed 21 August 2026, with respect to the rejection of claims 1 and 14 under 35 U.S.C. 112(b) have been entered. The rejections of claim 14 under 35 U.S.C. 112(b) have been withdrawn. However, the rejection of claim 1 under 35 U.S.C. 112(b) is maintained, see response to arguments below.
Response to Arguments
3. Applicant’s arguments, filed 21 August 2026, with respect to the rejection of claim 1 under 35 U.S.C. 112(b) and 35 U.S.C. 103 have been fully considered but they are not persuasive for the reasons set forth below.
4. Argument argues on pg. 8-9 that “etching rate” clearly refers to how quickly portions of the electrical insulator etch relative to one another during a single isotropic etching process, i.e., under uniform environmental and process conditions. The argument is not persuasive. Claim 1 recites no etchant or etching conditions, and the specification identifies them only by example ([0061] of the instant specification teaches that the etching rate referred to may, e.g., be the etching rate for isotropic etching). The use of language such as “may be” fails to establish clear boundaries for the claim. The relative etching rates of the claimed materials depend on the etchant. The same structure may meet or fail the limitation depending on an unrecited condition, so the scope is not reasonably certain (MPEP 2173.02(I)).
Applicant further argues on pg. 9 that, by relying on Cheng, the Office effectively conceded that etch rate is clear. This is not persuasive. Applying prior art under the broadest reasonable interpretation does not concede definiteness (MPEP 2173.06(II)). Moreover, Cheng specifies the etchant and the materials, which claim 1 does not.
5. Applicant argues on pg. 11 that based on Kim’s teachings, excluding the first and second conductive films 314 and 315 such that the sidewalls of first and second insulating layers 311 and 312 are exposed would not be an obvious variation of Kim’s ion trap device. The argument is not persuasive. Applicant relies on the embodiment of Kim Fig. 4, but a reference is relevant for all that it teaches, including non-preferred embodiments (MPEP 2123). Kim does not require both sidewall films ([0017], [0055]). See more details in the rejection below.
Claim Rejections - 35 USC § 112
3. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
4. Claims 1 and its dependent claims are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
5. Claim 1 recites “wherein an etching rate of the electrical insulator increases along a direction pointing from the upper surface to the lower surface.” The term “an etching rate” is unclear because an etching rate is not an absolute, static property of a material. An etching rate can depend on specific etching environment, processes, and chemical etchants used. One of ordinary skill in the art would not be able to determine with certainty the scope of the claim.
Claim Rejections - 35 USC § 103
6. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
8. Claims 1-3, 5-13, 15 are rejected under 35 U.S.C 103 as being unpatentable over Kim (US-20170316335) in view of Cheng (US 20210210682).
9. Regarding claim 1:
Kim teaches a device for controlling trapped ions ([0049] fig. 4 element 10 teaches an ion trap device), the device comprising:
a substrate ([0049] teaches a semiconductor substrate 101);
a metal layer disposed over the substrate ([0062] fig. 6 teaches a ground conductive film 300 is above the substrate 101. A metal material can be used for the conductive film);
an electrode of an ion trap disposed over the metal layer, wherein the electrode is configured to trap one or more ions in a space above the electrode ([0049] teaches an electrode conductive film 330 that constitutes central DC electrodes 110, 120, RF electrode 130, and side DC electrodes 141, 142. [0042] teaches that charged particles which are trapped in the trap region 150 include ions. As shown in fig. 4 the trap region 150 is above the electrode conductive film 330); and
an electrical insulator disposed between the metal layer and the electrode ([0049] teaches an insulating layer 310 for preventing a breakdown between the ground conductive film 300 and the electrode conductive film 330), wherein the electrical insulator comprises an upper surface facing towards the electrode, a lower surface facing towards the metal layer (as shown in fig. 4, the upper surface of the insulating layer 310 faces towards the electrode conductive film 330 that constitutes the RF electrode 130, which includes a first RF rail 131, and the lower surface of the insulating layer 310 faces towards the ground conductive film 300. [0044] teaches that the RF electrode 130 includes a first RF rail 131).
In one embodiment (fig. 4), Kim does not specifically note that one or more exposed sidewalls each extending at least partway between the upper surface and the lower surface. However, in further description and embodiments, Kim teaches that one or more exposed sidewalls each extending at least partway between the upper surface and the lower surface ([0055] teaches that the overhang structure 313 allows the first insulating layer 311 to reduce its sidewall area being exposed to ions trapped in the trap region. Reducing exposed sidewall area at least suggests that sidewall area remains partially exposed. [0017] also teaches that a sidewall of at least one of the first insulating layer or the second insulating layer may have a conductive film formed thereon. Kim thus contemplates covering the sidewall of only one insulating layer, leaving the sidewall of the other insulating layer uncovered, i.e., exposed).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim to include that one or more exposed sidewalls each extending at least partway between the upper surface and the lower surface. One of ordinary skill in the art would be motivated to make such modification to simplify fabrication since Kim teaches that the conductive films are optional, and one of the may be used without the other ([0017]).
Kim fails to teach that wherein an etching rate of the electrical insulator increases along a direction pointing from the upper surface to the lower surface.
However, Cheng teaches that wherein an etching rate of the electrical insulator increases along a direction pointing from the upper surface to the lower surface ([0055] teaches that the dielectric stack 210 can include a plurality of dielectric layers having different properties. [0057] teaches that the dielectric layer 212 can be etched faster than the dielectric layer 214, and the dielectric layer 214 can be etched faster than the dielectric layer 216. As shown in fig. 7 the dielectric layer 216 is on top of the dielectric layer 214, which is further on top of the dielectric layer 212).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein an etching rate of the electrical insulator increases along a direction pointing from the upper surface to the lower surface. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific shape (as taught in Cheng [0057]).
10. Regarding claim 2:
Kim in view of Cheng teaches the device of claim 1. Kim further discloses that wherein the electrical insulator ([0049] teaches an insulating layer 310) comprises a dielectric layer and an interface layer, wherein the interface layer is disposed between the electrode (as shown in fig. 4 the electrode conductive film 330 that constitutes the RF electrode 130, which includes a first RF rail 131) and the dielectric layer, wherein the dielectric layer is disposed between the interface layer and the metal layer ([0053] teaches that the insulating layer 310 includes a first insulating layer 311, which corresponds to the dielectric layer, and the second insulating layer 312, which corresponds to the interface layer. [0063] teaches that the material for the first insulating layer may be silicon dioxide, which is a dielectric layer. The arrangement of the layers is fully taught in fig. 4, where the first insulating layer 311 is between the second insulating layer 312 and the ground conductive film 300, and the second insulating layer 312 is between the RF rail 131, which is part of the RF electrode 130, and the first insulating layer 311. [0044] teaches that the RF electrode 130 includes a first RF rail 131).
Kim fails to teach that wherein the interface layer comprises a first material with a first etching rate, wherein the dielectric layer comprises a second material with a second etching rate, and wherein the first etching rate is smaller than the second etching rate.
However, Cheng teaches that wherein the interface layer comprises a first material with a first etching rate, wherein the dielectric layer comprises a second material with a second etching rate, and wherein the first etching rate is smaller than the second etching rate ([0055] teaches that the dielectric stack 210 can include a plurality of dielectric layers having different properties. For example, the dielectric layers 212 through 216 can have varying oxygen and nitrogen ratios. [0057] teaches that the dielectric layer 212 can be etched faster than the dielectric layer 214, and the dielectric layer 214 can be etched faster than the dielectric layer 216. The dielectric layer 216 corresponds to the interface layer with the first material. The dielectric layers 212 and 214 correspond to the dielectric layer with the second material).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the interface layer comprises a first material with a first etching rate, wherein the dielectric layer comprises a second material with a second etching rate, and wherein the first etching rate is smaller than the second etching rate. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific shape (as taught in Cheng [0057]).
11. Regarding claim 3:
Kim in view of Cheng teaches the device of claim 2. Kim fails to teach that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon, and wherein the second material is a dielectric material different from the first material.
However, Cheng teaches that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon ([0055] teaches that the dielectric layer 216 can include silicon nitride), and wherein the second material is a dielectric material different from the first material ([0055] teaches that the dielectric layers 212 through 216 can have varying oxygen and nitrogen ratios. As the ratio changes, the materials for the layers are different).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon, and wherein the second material is a dielectric material different from the first material. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific shape (as taught in Cheng [0057]).
12. Regarding claim 5:
Kim in view of Cheng teaches the device of claim 2. Kim fails to teach that wherein the dielectric layer comprises silicon oxynitride, wherein a nitride concentration of the dielectric layer decreases in the direction pointing from the upper surface to the lower surface, and wherein an oxide concentration of the dielectric layer increases in the direction pointing from the upper surface to the lower surface.
However, Cheng teaches that wherein the dielectric layer comprises silicon oxynitride ([0055] teaches that the dielectric layer 214 can include silicon oxynitride SiON), wherein a nitride concentration of the dielectric layer decreases in the direction pointing from the upper surface to the lower surface ([0055] teaches that the dielectric layer 212 can include silicon oxide (SiO2). The dielectric layers 212 through 216 can have varying oxygen and nitrogen ratios), and wherein an oxide concentration of the dielectric layer increases in the direction pointing from the upper surface to the lower surface (as taught in [0055] and fig. 7, the oxide and nitride concentrations change according to the direction, where the dielectric layer 214 is on top of dielectric layer 212).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the dielectric layer comprises silicon oxynitride, wherein a nitride concentration of the dielectric layer decreases in the direction pointing from the upper surface to the lower surface, and wherein an oxide concentration of the dielectric layer increases in the direction pointing from the upper surface to the lower surface. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific shape (as taught in Cheng [0057]).
13. Regarding claim 6:
Kim in view of Cheng teaches the device of claim 2. Kim fails to teach that wherein the dielectric layer comprises a plurality of sublayers of silicon oxynitride, and wherein the sublayers have different concentrations of nitride.
However, in further description and embodiments, Cheng teaches that wherein the dielectric layer comprises a plurality of sublayers of silicon oxynitride, and wherein the sublayers have different concentrations of nitride ([0036] teaches that the dielectric material 110 can include silicon oxynitride having a varying oxygen and nitrogen ratio, such that the dielectric material 110 has an N-rich first end and an O-rich second end. Fig. 1 shows the gradient of the dielectric material 110, gradient layers 112 through 116). Although the orientation in fig. 1 as taught in Cheng is inverted, Cheng in another embodiment (fig. 7 [0055]) teaches the slower etching layer over a faster-etching layer to create a sloped profile.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the dielectric layer comprises a plurality of sublayers of silicon oxynitride, and wherein the sublayers have different concentrations of nitride. Such modification would allow for exploiting etch rate variations through out the gradient composition of the dielectric material to form a specific etched shape (as taught in Cheng [0038] and [0057]).
14. Regarding claim 7:
Kim in view of Cheng teaches the device of claim 2. Kim fails to teach that wherein the second material is silicon oxide.
However, Cheng teaches that wherein the second material is silicon oxide ([0055] teaches that the dielectric layer 212 can include silicon oxide).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the second material is silicon oxide. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific etched shape (as taught in Cheng [0057]).
15. Regarding claim 8:
Kim in view of Cheng teaches the device of claim 2. Kim further teaches that wherein an upper surface of the interface layer directly contacts to a lower surface of the electrode ([0018] teaches forming a conductive film on the pattern of the second insulating layer to form an electrode pattern of at least one of an RF electrode. As shown in fig. 4 the upper surface of the second insulating layer 312 is in contact with a lower surface of electrode conductive film 330 that constitutes RF electrode 130), and/or wherein a lower surface of the interface layer directly contacts to an upper surface of the dielectric layer ([0018] teaches forming a pattern of a second insulating layer on the first insulating layer. Because the second insulating layer 312 is formed on the first insulating layer 311, the lower surface of the second insulating layer 312 is in contact with the upper surface of the first insulating layer 311).
16. Regarding claim 9:
Kim in view of Cheng teaches the device of claim 1. Kim fails to teach that wherein the electrical insulator comprises a first material and a second material, wherein a concentration of the first material at or in proximity to the upper surface is greater than a concentration of the first material at or in proximity to the lower surface, and wherein a concentration of the second material at or in proximity to the upper surface is smaller than a concentration of the second material at or in proximity to the lower surface.
However, Cheng teaches that wherein the electrical insulator comprises a first material and a second material, wherein a concentration of the first material at or in proximity to the upper surface is greater than a concentration of the first material at or in proximity to the lower surface, and wherein a concentration of the second material at or in proximity to the upper surface is smaller than a concentration of the second material at or in proximity to the lower surface ([0055] teaches that the dielectric stack 210 can include a plurality of dielectric layers having different properties. For example, the dielectric layers 212 through 216 can have varying oxygen and nitrogen ratios. [0055] teaches that the dielectric layer 216 can include silicon nitride. The dielectric layer 212 can include silicon oxide. In the case where silicon nitride corresponds to the first material, and silicon oxide corresponds to the second material, the concentration of silicon nitride is lower closer to the lower surface of the dielectric layers 212 through 216. The concentration of silicon oxide is higher in proximity to the lower surface of the dielectric layers 212 through 216).
17. Regarding claim 10:
Kim in view of Cheng teaches the device of claim 9. Kim fails to teach that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon, and wherein the second material is a dielectric material different from the first material.
However, Cheng teaches that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon ([0055] teaches that the dielectric layer 216 can include silicon nitride), and wherein the second material is a dielectric material different from the first material ([0055] teaches that the dielectric layers 212 through 216 can have varying oxygen and nitrogen ratios. The dielectric layer 212 can include silicon oxide).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include teach that wherein the first material is selected from the group consisting of silicon nitride, silicon oxynitride and amorphous silicon, and wherein the second material is a dielectric material different from the first material. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific shape (as taught in Cheng [0057]).
18. Regarding claim 11:
Kim in view of Cheng teaches the device of claim 9. Kim fails to teach that wherein the second material is silicon oxide.
However, Cheng teaches that wherein the second material is silicon oxide ([0055] teaches that the dielectric layer 212 can include silicon oxide).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng to include that wherein the second material is silicon oxide. Such modification would allow for exploiting etch rate variations throughout the gradient composition of the dielectric material to form a specific etched shape (as taught in Cheng [0057]).
19. Regarding claim 12:
Kim in view of Cheng teaches the device of claim 1. Kim further teaches that wherein the electrical insulator provides a first lateral edge at a first level and a second lateral edge at a second level, wherein the second level is located above the first level in a direction pointing from the lower surface to the upper surface, and wherein the second lateral edge protrudes over the first lateral edge in a lateral direction ([0053] teaches that the insulating layer 310 includes a first insulating layer 311 and the second insulating layer 312, which provide the first and second levels and their respective later edges. As shown in fig. 4, the second insulating layer 312 is above the first insulating layer 311. [0070] teaches that the difference of the pattern widths between the second insulating layer 312 and the pattern width of the first insulating layer 311 results in an overhang length of the second insulating layer 312).
20. Regarding claim 13:
Kim in view of Cheng teaches the device of claim 12. Kim further teaches that wherein the electrical insulator has a tapering shape in the direction pointing from the upper surface to the lower surface (Under broadest reasonable interpretation, tapering shape means any shape that exhibits a decrease in width of its layers along its length. [0070] teaches that the difference of the pattern widths between the second insulating layer 312 and the pattern width of the first insulating layer 311 results in an overhang length of the second insulating layer 312).
21. Regarding claim 15:
Kim in view of Cheng teaches the device of claim 1. Kim further teaches an electrode feed line connected to the electrode ([0044] teaches that the RF electrode 130 includes a first RF rail 131 and a second RF rail 132 connected to the RF pad 133, which together corresponds to the electrode feed line), wherein the electrode feed line and the electrode are part of a structured electrode layer ([0049] teaches an electrode conductive film 330 that constitutes central DC electrodes 110, 120, RF electrode 130, and side DC electrodes 141, 142).
22. Claim 4 is rejected under 35 U.S.C 103 as being unpatentable over Kim, in view of Cheng, further in view of Nunan (US 6747338).
23. Regarding claim 4:
Kim in view of Cheng teaches the device of claim 2. Kim in view of Cheng fails to teach that wherein the interface layer has a thickness equal to or less than 150 nm.
However, Nunan teaches that wherein the interface layer has a thickness equal to or less than 150 nm (column 5 teaches that the silicon-rich nitride sub-layer has a thickness within a range of about 1000-5000 Angstrom, which is 100nm-500nm).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng, further in view of Nunan to include that wherein the interface layer has a thickness equal to or less than 150 nm. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). As such, Nunan’s teaching of a range of about 1000-5000 Angstrom makes the claimed range of equal to or less than 150nm obvious. One of ordinary skill in the art would be motivated to make the modification to reduce manufacturing costs (as taught in Nunan column 2).
24. Claim 14 is rejected under 35 U.S.C 103 as being unpatentable over Kim, in view of Cheng, further in view of Stick, Daniel, et al. "Demonstration of a microfabricated surface electrode ion trap." arXiv preprint arXiv:1008.0990 (2010) [hereinafter referred to as Stick].
[Note: reference was supplied in previous correspondence].
25. Regarding claim 14:
Kim in view of Cheng teaches the device of claim 1. Kim in view of Cheng fails to teach that wherein a lateral dimension of the electrode is less than 10 × D, and wherein D is a thickness of the electrical insulator.
However, Stick teaches that wherein a lateral dimension of the electrode is less than 10 × D, and wherein D is the thickness of the electrical insulator (as shown in fig. 2, the insulating oxide layer has a thickness of 9-14 microns, while the RF trap electrode has a lateral dimension of 60 (microns), which is less than 10 times the thickness of the insulating oxide layer).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to have modified Kim in view of Cheng, further in view of Stick to include that wherein a lateral dimension of the electrode is less than 10 × D, and wherein D is the thickness of the electrical insulator. In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). As such, Stick’s teaching that the insulating oxide layer has a thickness of 9-14 microns, while the RF trap electrode has a lateral dimension of 60 (microns) makes the claimed range of less than 10 × D obvious. One of ordinary skill in the art would be motivated to make the modification to create a scalable physical system for trapping ions (as taught in Stick pg. 1).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LARRY LI whose telephone number is (571) 272-5043. The examiner can normally be reached 8:30am-4:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Robert Kim can be reached at (571) 272-2293. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/LARRY LI/
Examiner, Art Unit 2881
/WYATT A STOFFA/Primary Examiner, Art Unit 2881
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