Prosecution Insights
Last updated: August 16, 2026
Application No. 18/605,500

SEMICONDUCTOR DEVICE HAVING CONNECTION WIRING TO WHICH WIRE IS CONNECTED

Non-Final OA §103
Filed
Mar 14, 2024
Priority
Apr 25, 2022 — JP 2022-071586 +1 more
Examiner
AU, BAC H
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co., Ltd.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
677 granted / 836 resolved
+13.0% vs TC avg
Moderate +11% lift
Without
With
+10.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
16 currently pending
Career history
862
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
50.7%
+10.7% vs TC avg
§102
28.0%
-12.0% vs TC avg
§112
12.3%
-27.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 836 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3 and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshihara (U.S. Pub. 2017/0092596) in view of Choi (U.S. Pub. 2021/0143076) and Sunaga (U.S. Pub. 2016/0181221). Regarding claim 1, Yoshihara [Figs.4A-B] discloses a semiconductor device, comprising: a first conductive portion [3] and a second conductive portion [6] provided with a gap in between; connection wiring [20], including: a first bonding portion [bonding surface portion of 20 above 3] bonded to a front surface of the first conductive portion [3], a second bonding portion [bonding surface portion of 20 above 6] bonded to a front surface of the second conductive portion [6], and a wiring portion [vertical and horizontal portions of 20] that straddles the gap and connects the first bonding portion and the second bonding portion; and a wire bonded [12] to the wiring portion, wherein the wiring portion includes: a vertical portion [vertical portion of 20 above 3] that extends, from a lower end thereof to an upper end thereof, perpendicularly to the front surface of the first conductive portion [3], the lower end thereof being connected to the first bonding portion; a parallel portion [horizontal portion of 20] that extends in parallel to the first conductive portion and the second conductive portion from the upper end of the vertical portion, the parallel portion having, on a front surface thereof, a wire bonding portion to which one end of the wire [12] is bonded. a (third) portion [vertical portion of 20 above 6] that extends from the parallel portion toward the second bonding portion [6]. Yoshihara fails to explicitly disclose an inclined portion that extends inclinedly from the parallel portion toward the second bonding portion. However, Choi [Figs.5,8] and Sunaga [Fig.16E] disclose and makes obvious various shapes and relative sizes of the vertical portions of the connection wiring wherein the wiring portion of a connection wiring comprising an inclined portion that extends inclinedly from the parallel portion [36aa] toward the second bonding portion [33b] [Sunaga; Fig.16E]. It would have been obvious to provide wherein the wiring portion includes an inclined portion that extends inclinedly from the parallel portion toward the second bonding portion, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Regarding claim 2, Yoshihara discloses the semiconductor device wherein the first conductive portion [3] is a main electrode provided on a front surface of a semiconductor chip [1]. Regarding claim 3, Choi [Figs.5,8] and Sunaga [Fig.16E] disclose the inclined portion, but fails to explicitly disclose wherein an angle of inclination between the inclined portion and the second bonding portion is 30 degrees or more and 60 degrees or less. However, the angle of inclination of the inclined portion [between 36aa and 36ac] disclosed by Sunaga appears to be approximately between 30 to 60 degrees. It is also obvious to set a desired angle of inclination as a design choice for optimization purposes. It would be obvious since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Regarding claim 5, Yoshihara discloses the semiconductor device whereinin a plan view of the semiconductor device, the parallel portion of the wiring portion [horizontal portion of 20] has a first side and a second side, the second side being closer to the vertical portion than the first side; and the wire bonding portion [upper surface of 20 wherein wire 12 is bonded] is bonded to the second side of the parallel portion [Fig.4B]. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yoshihara (U.S. Pub. 2017/0092596) in view of Choi (U.S. Pub. 2021/0143076) and Sunaga (U.S. Pub. 2016/0181221), as applied above and further in view of Flauta (U.S. Pub. 2023/0137612). Regarding claim 6, Yoshihara fails to explicitly disclose an applied coating as claimed. However, Flauta [Fig.2] discloses a semiconductor device, further comprising: a coating [19b] applied to the first conductive portion, the second conductive portion [14-2], and the wire [18]; and an encapsulating member [12] that adheres to the coating [Paras.38,46]. It would have been obvious to provide the coating to the semiconductor device to improve adhesion with the encapsulant, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007). Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Prior art does not fairly disclose or make obvious the claimed device/method taken as a whole, and specifically, the limitations of wherein the wiring portion has at least one groove or at least one protrusion, which is arranged perpendicular to a wiring direction of the wiring portion, formed on a front surface thereof between the wire bonding portion and the second bonding portion. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art is considered analogous art and discloses at least some of the claimed subject matter of the current invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BAC H AU whose telephone number is (571)272-8795. The examiner can normally be reached M-F 9:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BAC H AU/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Mar 14, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
92%
With Interview (+10.9%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 836 resolved cases by this examiner. Grant probability derived from career allowance rate.

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