DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 6 and 7 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Chen (US 2020/0135692).
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Regarding claim 1, Chen (US 2020/0135692) discloses:
A method of manufacturing a semiconductor package, comprising:
providing a first die (120a, ¶0014) having opposing top surface and bottom surface;
forming a plurality of first conductive bumps (122a, ¶0016) on the top surface of the first die, wherein the first conductive bumps (122a) are electrically connected to the first die (120a);
adhering the first die (120a) to a heat spreader (110, ¶0014);
forming a molding layer (130, ¶0018) on the heat spreader (110) to cover the first conductive bumps (122a) and the first die (120a);
grinding the molding layer to expose the first conductive bumps (¶0020); and
forming a redistribution layer (140, ¶0022) on the molding layer (130) to electrically connect to the first conductive bumps (122a).
Regarding claim 2, Chen further discloses:
providing a second die (120b, ¶0014) having opposing top surface and bottom surface;
forming a plurality of second conductive bumps (122b, ¶0015) on the top surface of the second die (122b), wherein the second conductive bumps (122b) are electrically connected to the second die (120b);
adhering the second die (120b) to the heat spreader (110);
covering the second conductive bumps (122b) and the second die (120b) with the molding layer (130);
exposing the second conductive bumps (122b) from the molding layer (130); and
electrically connecting the redistribution layer (140) to the second conductive bumps.
Regarding claim 3, Chen further discloses:
wherein the heat spreader is a lead frame (stamped metal sheet, ¶0014).
Regarding claim 6, Chen further discloses:
wherein the first conductive bumps are formed on the first die by a bumping process (¶0016).
Regarding claim 7, Chen further discloses:
wherein the first die is adhered to the heat spreader after the first conductive bumps are formed on the first die (¶0016 discloses the die along with its bumps are disposed together).
Allowable Subject Matter
Claims 4, 5 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 4, the prior art does not disclose “wherein the first conductive bumps are formed on the first die by a wire bonding process using one of gold wires, copper wires and alloy wires” in combination with the remaining claimed features.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM A HARRISTON/Primary Examiner, Art Unit 2899
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