DETAILED ACTION
This Office action is in response to the application filed on 15 March 2024 and the preliminary claims amendments filed on 01 August 2025.
Notice of Pre-AIA or AIA Status
The present application is being examined under the pre-AIA first to invent provisions.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(b) the invention was patented or described in a printed publication in this or a foreign country or in public use or on sale in this country, more than one year prior to the date of application for patent in the United States.
Claims 23-32, 34 and 37-43 are rejected under pre-AIA 35 U.S.C. 102(b) as being anticipated by Williams et al. (US 2008/0158915; “Williams”).
In re claims 23 and 37, Williams discloses a power converter (Figs. 14A-B, 18, 23A, 24A, 27A, 28A, or 30A-B; Fig. 14A-B will be used as representative of the embodiments disclosed in Williams) and corresponding method1 comprising:
a regulating circuit (Fig. 14A: 401) configured to provide a first regulated voltage (Vy) based on a first regulation control signal (Fig. 14A/B: feedback signal VFBin);
a switched capacitor circuit (408, 409, 410) coupled to the regulating circuit (see Fig. 14A), wherein the switched capacitor circuit is configured to provide, to a load (412), a first switched capacitor voltage (nVy) of the switched capacitor circuit based on the first regulated voltage (switched capacitor circuit 408 receives first regulated voltage Vy and uses it to produce first switched capacitor voltage nVy); and
a control circuit (413, 406, 405, 414; see detail of Fig. 14B) coupled to the regulating circuit and the switched capacitor circuit (as shown in Fig. 14A), wherein the control circuit is configured to provide a second regulation control signal (PWM output signal from 406 to 405 in Fig. 14A; corresponding to output of 406D in Fig. 14B) to the regulating circuit based on the first switched capacitor voltage (Fig. 14A and [0222]: first switched capacitor voltage nVy is received as feedback by the control circuit and used to produce the second regulating signal).
In re claim 24, Williams discloses wherein the control circuit is configured to provide the second regulation control signal to the regulating circuit further based on the first regulated voltage (Fig. 14A and [0221]: the first switched capacitor voltage nVy used for feedback is a scaled version of the first regulated voltage Vy).
In re claims 25 and 38, Williams discloses (see Fig. 23A, as cited above with respect to claim 1, and showing an embodiment having all of the elements cited above with respect to Fig. 14A and further showing more detail of the switched capacitor circuit, labeled here as 650B) wherein:
the regulating circuit is further configured to provide a second regulated voltage (Fig. 14A or 23A: Vx, which is controlled or regulated by the PWM switching of transistors 417, 403) based on the second regulation control signal (Vx is produced by switching transistors 417, 403 in Fig. 14A or 651, 652 in Fig. 23A based on second regulated control signal which is output by the PWM circuit 406/668); and
the switched capacitor circuit is further configured to provide, to the load, a second switched capacitor voltage based on the second regulated voltage (in the case of Fig. 23A, the first switched capacitor voltage is the voltage across Cfly2/663, provided to load through 661, and the second switched capacitor voltage is the voltage across Cfly1/664, provided to load through 662).
In re claim 26, Williams discloses wherein the regulating circuit (Fig. 14A: 401) comprises at least one switch (417 or 403), and wherein the regulating circuit is configured to provide the first regulated voltage (Vy) by opening and closing the at least one switch according to a duty cycle defined by the first regulation control signal (Figs. 14A/B and [0223]: in a known and conventional manner, the pulse-width modulation comparator 406C and flip/flop 406D produce a pulse width modulated signal for toggling the switching transistors 417/403 that has a duty cycle defined by the first regulation control signal VFBin).
In re claim 27, Williams discloses wherein the control circuit is further configured to generate the second regulation control signal (Fig. 14A/B: PWM output of 406/406D) based on the first switched capacitor voltage of the switched capacitor circuit and a reference voltage (Figs. 14A/B and [0223]: first switched capacitor voltage nVy is used to produce feedback signal VFBin, which is provided to error amplifier 406A to be compared against reference voltage Vref from 406B, and used to produce the second regulation control signal output from the PWM circuit 406).
In re claims 28 and 37, Williams discloses wherein:
the control circuit is further configured to generate an error signal (Fig. 14B: output of error amplifier 406A) based on the first switched capacitor voltage (Figs. 14A/B: first switched capacitor voltage nVy is used as feedback to 414 to produce the first regulation control signal VFBin, which is provided to error amp 406A) of the switched capacitor circuit and the reference voltage (Fig. 14B: Vref provided to error amp 406A); and
the control circuit is configured to provide the second regulation control signal based on the error signal and a saw-tooth signal (Fig. 14B and [0223]: PWM comparator 406C and flip-flop 406D produce the second regulation control signal by comparing error signal from 406A to sawtooth/ramp signal as shown).
In re claims 29 and 40, Williams discloses wherein the control circuit is configured to generate the saw-tooth signal based on a clock signal (Figs. 14A/B and [0223]-[0224]: sawtooth/ramp signal is produced from oscillating clock signal Φ).
In re claims 30 and 41, Williams discloses wherein the saw-tooth signal is further based on the first regulated voltage ([0215], [0223]: the saw-tooth is used to pulse width modulate the control signal for controlling the regulating circuit transistors (Fig. 14A) in order to generate the first regulated voltage Vy).
In re claims 31 and 42, Williams discloses wherein a duty cycle associated with the second regulation control signal (Figs. 14A/B: output of PWM circuit 406/406D) is based on the clock signal ([0223]-[0224]: the clock signal Φ is used to produce sawtooth/ramp signal provided to the PWM comparator 406C to generate the PWM signal having the duty cycle based on comparison of sawtooth/ramp with terror signal from 406A).
In re claim 32, Williams discloses (see Fig. 23A, as cited above with respect to claim 1, and showing an embodiment having all of the elements cited above with respect to Fig. 14A and further showing more detail of the switched capacitor circuit, labeled here as 650B) wherein the control circuit is configured to generate one or more control signals (Fig. 23A: gate signals VG3-VG9 output from BBM 666) to switch the switched capacitor circuit (650B) between different network states (i.e., based on the particular logic levels of each of VG3-VG9, the switched capacitor circuit will take on different network states, as shown in Figs. 23B/C) based on the first regulated voltage (VFBin, provided to PWM circuit 668 in Fig. 23A) and a trigger voltage (output from PWM 668 to BBM 666).
In re claims 34 and 43, Williams discloses wherein:
the regulating circuit (Fig. 14A: 401) is configured to:
receive an input voltage (Vbatt); and
provide the first regulated voltage (Vy) based on the first regulation control signal (VFBin used as feedback to PWM 406) and the input voltage (Vbatt is converted to Vy using VFBin as feedback: [0223]); and
the switched capacitor circuit (Fig. 14A: 408) is configured to provide the first switched capacitor voltage (nVy) based on the first regulated voltage (Vy) by switching the switched capacitor circuit between a plurality of network states (see [0221] and illustrations of example network states for the switched capacitor circuit as shown in Figs. 19A/B, 23B/C).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 23-25 and 37-38 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-26 of U.S. Patent No. 8,723,491 (hereinafter “US ‘491”). See table and explanations below.
Claims 23-25, 27, 32-33 and 37-38 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-30 of U.S. Patent No. 9,143,037 (hereinafter “US ‘037”). See table and explanations below.
Claims 23-25, 27-29, 32-40 and 43-45 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of U.S. Patent No. 10,686,380 (hereinafter “US ‘380”). See table and explanations below.
Claims 23-34 and 37-43 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-19 of U.S. Patent No. 11,165,350 (hereinafter “US ‘350”). See table and explanations below.
Claims 23-28, 32, 34-39 and 43-45 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-54 of U.S. Patent No. 11,936,300 (hereinafter “US ‘300”). See table and explanations below.
Claims 23-27, 32-38 and 43-45 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-30 of U.S. Patent No. 12,176,815 (hereinafter “US ‘815”). See table and explanations below.
Although the claims at issue are not identical, they are not patentably distinct from each other because the rejected claims of this application are found in corresponding ones of the reference claims found in the cited patents. That is, the rejected claims are effectively anticipated by the corresponding reference claim(s), and therefore a rejection based on non-statutory double patenting is appropriate. These correspondences between rejected claims and patented claims are listed in the table below. Claim-to-claim comparisons for independent claims 23 and 37 follow below the table.
Claim
US ‘491
US ‘037
US ‘380
US ‘350
US ‘300
US ‘815
23,37
9,12,14,15
1,14,17,28
1,2,4,5
1,4,17,19
1,2,15,19, 31,34
1,7,10,19,23,26
24
15
12,13
4,5
1,4,17,19
2,4,22,23,34
1,7,10,19,23,26
25, 38
1,5,20,22
1,7
4,5
1,17
2,4,22,23,33
1,7,10,19,23,26
26
n/a
n/a
n/a
12,13
2,4,22,23,34
17
27
14,15
14,15
4,5,14-16
4,19
36,37
7,19,29
28,39
n/a
n/a
14
12,13
33
n/a
29,40
n/a
n/a
14
12,13
n/a
n/a
30,41
n/a
n/a
n/a
12,13
n/a
n/a
31,42
n/a
n/a
n/a
12,13
n/a
n/a
32
n/a
14,15
18
14,15
4,21
5,18,26,27, 28
33
n/a
14,15
4,5
14,15
n/a
5,18,28
34,43
14,15
14,15
4,5,18
2,5
1,26,31
2,11,25
35,44
n/a
17
18
n/a
1
1
36,45
n/a
n/a
18
n/a
1
5,17,26
Instant claim 23 and corresponding method claim 37
Claims 9+12+14+15 of US ‘491
A power converter comprising:
An apparatus for power conversion (claim 9)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
a first element configured to accept an input signal … output an intermediate signal having a second voltage … said first element is … a regulating element (claim 9)
…
controller is configured to generate a first control signal based on the output signal; and to send the first control signal to the regulating element (claim 14)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a second element configured to receive said intermediate signal from said first element and to output an output signal having a third voltage … said second element is … a voltage transformation element otherwise (claim 9; “voltage transformation element” being interpreted in light of the spec as a switched capacitor circuit)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
a controller configured to control a period of said voltage transformation element and a period of said regulating element (claim 9; control of both elements indicates coupling)
…
wherein the controller is configured to generate a first control signal based on the output signal; and to send the first control signal to the regulating element (claim 14)
Instant claim 23 and corresponding method claim 37
Claims 1+14 (corresponding elements recited in claims 17+28) of US ‘037
A power converter comprising:
An apparatus for power conversion (claim 1)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
a first element configured to accept an input signal having a first voltage and to output an intermediate signal having a second voltage …
the first element … a regulating element (claim 1)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a second element configured to receive the intermediate signal from the first element and to output an output signal having a third voltage …
said second element is … a voltage transformation element otherwise (claim 1; “voltage transformation element” being interpreted in light of the spec as a switched capacitor circuit)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
controller configured to output first and second control signals based at least in part on said clock signal, said first control signal controlling a period of said first … element, and said second control signal controlling a period of said second and fourth elements (claim 1) …
said controller is configured to output said first and second control signals based at least in part on said clock signal, said input signal, and said output signal (claim 14)
Instant claim 23 and corresponding method claim 37
Claims 1+2+4+5 of US ‘380
A power converter comprising:
An apparatus for power conversion (claim 1)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
a first element that accepts an input signal having a first voltage and outputs intermediate signals, each having a corresponding second voltage … a second set comprises inductive sub-elements … said first and second elements are selected from the group consisting of said first and second sets (claim 1; inductive sub-elements being understood in light of the spec as regulating elements)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a second element that receives said intermediate signals and outputs an output signal having a third voltage … a first set comprises voltage-transformation sub-elements … said first and second elements are selected from the group consisting of said first and second sets (claim 1; “voltage transformation sub-element” being interpreted in light of the spec as a switched capacitor circuit)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
a multi-phase controller that receives said intermediate signals and a clock voltage … controller controls … a corresponding one of said inductive sub-elements, wherein said multi-phase controller provides first and second outputs for controlling said inductive sub-elements (claim 14)
Instant claim 23 and corresponding method claim 37
Claims 1+4 (corresponding elements recited in claims 17+19) of US ‘350
A power converter comprising:
A power converter comprising: (claim 1)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
regulating circuit … one or more output signals to include at least a first control signal generated by the first control section to control a period of the regulating circuit (claim 1)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a switched capacitor network … controller to implement a dead-time interval, wherein the controller to generate one or more output signals based, at least in part, on the clock signal to control the at least some of the plurality of switches substantially in accordance with the switching frequency (claim 1)
…
the clock signal comprises a clock voltage and the one or more input signals comprise … an output voltage (claim 4)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
a controller comprising a first control section and a second control section … controller to generate one or more output signals based, at least in part, on the clock signal to control the at least some of the plurality of switches … wherein the one or more output signals to include at least a first control signal generated by the first control section to control a period of the regulating circuit and a second control signal generated by the second control section to control a period of the switched capacitor network (claim 1)
Instant claim 23 and corresponding method claim 37
Claims 1+2 (corresponding elements recited in claims 15+19 and 31+34) of US ‘300
A power converter comprising:
A power converter comprising: (claim 1)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
voltage converting circuit, wherein at least an output voltage of the voltage converting circuit is regulated in response to a first signal (claim 1)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a switched capacitor circuit coupled to the voltage converting circuit … provide an output voltage of the switched capacitor circuit to a node (claim 1)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
a controller coupled to the voltage converting circuit and the switched capacitor circuit to generate the first signal and one or more second signals (claim 2)
Instant claim 23 and corresponding method claim 37
Claims 1+7 (corresponding elements recited in claims 10+19 and 23+26) of US ‘815
A power converter comprising:
A power converter comprising: (claim 1)
a regulating circuit configured to provide a first regulated voltage based on a first regulation control signal;
a voltage converting circuit configured to provide an output voltage regulated based on a first signal (claim 1)
a switched capacitor circuit coupled to the regulating circuit, wherein the switched capacitor circuit is configured to provide, to a load, a first switched capacitor voltage of the switched capacitor circuit based on the first regulated voltage;
a switched capacitor circuit coupled to the voltage converting circuit … configured to provide, to an output node, an output voltage of the switched capacitor circuit (claim 1)
and a control circuit coupled to the regulating circuit and the switched capacitor circuit, wherein the control circuit is configured to provide a second regulation control signal to the regulating circuit based on the first switched capacitor voltage.
a controller coupled to the voltage converting circuit and the switched capacitor circuit, wherein the controller is configured to provide one or more control signals to the voltage converting circuit and to the switched capacitor circuit (claim 1)
…
controller is configured to generate the first signal and the one or more control signals in response to one or more voltage signals associated with the switched capacitor circuit and the voltage converting circuit, and wherein the one or more voltage signals comprise … an output voltage (claim 7)
In addition to the above correspondences showing how the instant independent claims are anticipated by one or more reference claims in each of the cited patents, so too the instant dependent claims 24-36 and 38-45, as far as applicable, may be found in the reference claims of the applicable cited patents as listed in the table of overall claim correspondences, provided above in this Office action.
Allowable Subject Matter
Claims 33, 35-36 and 44-45 would be allowable if rewritten to include all of the limitations of the base claim and any intervening claims and if a proper Terminal Disclaimer is filed to obviate the rejections for non-statutory double patenting presented above.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 33, the closest prior art in Williams, cited above in this Office action, discloses the invention according to claims 23 and 32, and also discloses wherein the regulating circuit is configured to provide the first regulated voltage based on the input voltage and the first regulation control signal (see Fig. 14A and [0223]). However, Williams does not disclose the further feature of claim 33, specifying that the control circuit is configured to provide the trigger voltage based on the first switched capacitor voltage and an input voltage. That is, the cited trigger voltage in Williams is not based on the first switched capacitor voltage and the input voltage. Furthermore, the additional prior art on record fails to provide an obvious suggestion to modify Williams in a manner that would have arrived at the invention recited in claim 33.
With respect to claim 35, the closest prior art in Williams, cited above in this Office action, discloses the invention according to claim 23, and also discloses the switched capacitor circuit is a multiple phase circuit comprising a first switched capacitor element and a second switched capacitor element each configured to change between a first network state and a second network state (see Fig. 23A, see also explanations thereof as provided above in this Office action). However, Williams does not disclose the further feature of claim 35, specifying that each switched capacitor element is configured to provide, to the load, the first switched capacitor voltage of the switched capacitor circuit in both the first network state and the second network state. That is, as shown in Figs. 23B-C of Williams, the first and second switched capacitor voltages are only provided to the load during one of the two states (i.e., in Fig. 23C but not in Fig. 23B). Furthermore, the additional prior art on record fails to provide an obvious suggestion to modify Williams in a manner that would have arrived at the invention recited in claim 35.
Claim 36 would be allowable under the stated conditions by virtue of its dependence on claim 35.
Claim 44 substantially corresponds to the scope and features recited in claim 35, and therefore would be allowable under the stated conditions for substantially similar reasons as explained above.
Claim 45 would be allowable under the stated conditions by virtue of its dependence on claim 44.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 2005/0017699 discloses a multi-stage, multi-phase power converter system that is configured similarly to that of the instant application.
US 2008/0158915 discloses a multi-phase, adaptive gain switched capacitor converter.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FRED E FINCH III whose telephone number is (571)270-7883. The examiner can normally be reached Monday-Friday, 8:00 AM - 4:30 PM ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Monica Lewis can be reached at (571) 272-1838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FRED E FINCH III/Primary Examiner, Art Unit 2838
1 The method claims recite the functional limitations of the device claims as steps of a method using the structure of the device claims. As such, the citations to Williams cover both the device and corresponding method claims.