DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment/Restriction
Applicant’s election without traverse of Group I and Claims 1-7 and 15-21 in the reply filed on July 30, 2026 is acknowledged. Thus, Claims 8-14 and 22-26 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention. Election was made without traverse in the reply filed on July 30, 2026.
Specification
The title of the invention is broad and not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 4-5 and 18-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. As to claims 4 and 18, the limitation “the same inclined surface” lacks sufficient antecedent basis. Thus, the limitation renders the claims indefinite and clarification is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-5, 7, 15-19, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2017/0352717 A1 to Choi et al. (“Choi”) in view of U.S. Patent Application Publication No. 2020/0286965 A1 to Lim et al. (“Lim”). As to claim 1, although Choi discloses a display apparatus comprising: a plurality of transistors (210) in a display area (DA); a plurality of light-emitting diodes (300) in the display area (DA), and electrically connected to the plurality of transistors (210); a supply line (215c) in a peripheral area (1A, 2A) outside the display area (DA); a partition wall (217 FIG. 7/219 FIG. 10) in the peripheral area (1A, 2A), and overlapping with a part of the supply line (215c); and an encapsulation layer (400) on the plurality of light-emitting diodes (300), wherein the supply line (215c) has a multi-layered structure comprising: a first conductive layer (215c1); a second conductive layer (215c2) on the first conductive layer (215c1); and a third conductive layer (215c3) on the second conductive layer (215c2), and wherein a side shape of a first portion (left FIG. 7/right FIG. 10) of the supply line (215c) that does not overlap with the partition wall (217 FIG. 7/219 FIG. 10) is different from a side shape of a second portion (right FIG. 7/left FIG. 10) of the supply line (215c) overlapping with the partition wall (217 FIG. 7/219 FIG. 10) (See Fig. 2, Fig. 3, Fig. 7, Fig. 10, ¶ 0046-¶ 0048, ¶ 0052, ¶ 0057, ¶ 0064, ¶ 0093-¶ 0099, ¶ 0103-¶ 0105) (Notes: the limitation “area” is defined as any particular extent of space or surface; part by Dictionary.com), Choi does not disclose wherein the supply line is a power voltage supply line. However, Lim does disclose wherein the supply line (VL1, VL2) is a power voltage supply line (VL1, VL2) (See Fig. 1, Fig. 6, ¶ 0044, ¶ 0087). In view of the teaching of Lim, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Choi to have wherein the supply line is a power voltage supply line because the power voltage supply line provides appropriate bias to the plurality of light-emitting diodes in the display area (See ¶ 0044, ¶ 0087). As to claim 15, although Choi discloses a display apparatus comprising: a plurality of transistors (210) in a display area (overlapping 211 and 300); a plurality of light-emitting diodes (300) in the display area (overlapping 211 and 300), and electrically connected to the plurality of transistors (210); an encapsulation layer (400) on the plurality of light-emitting diodes (300); a first supply line (215c) in a peripheral area (outside 211) outside the display area (overlapping 211 and 300); a partition wall (217 FIG. 7/219 FIG. 10) in the peripheral area (outside 211), and overlapping with a part of the first supply line (215c); and a pad (215b) in the peripheral area (outside 211), wherein the first supply line (215c) has a multi-layered structure comprising: a first conductive layer (215c1); a second conductive layer (215c2) on the first conductive layer (215c1); and a third conductive layer (215c3) on the second conductive layer (215c2), wherein the pad (215b) comprises a pad layer (215b) comprising: a first sub-layer (corresponding 215c1); a second sub-layer (corresponding 215c2) on the first sub-layer (corresponding 215c1); and a third sub-layer (corresponding 215c3) on the second sub-layer (corresponding 215c2), and wherein the first conductive layer (215c1) and the first sub-layer (corresponding 215c1) comprise the same material as each other, the second conductive layer (215c2) and the second sub-layer (corresponding 215c2) comprise the same material as each other, and the third conductive layer (215c3) and the third sub-layer (corresponding 215c3) comprise the same material as each other (See Fig. 2, Fig. 3, Fig. 7, Fig. 10, ¶ 0046-¶ 0048, ¶ 0052, ¶ 0057, ¶ 0064, ¶ 0093-¶ 0099, ¶ 0103-¶ 0105) (Notes: the limitation “area” is defined as any particular extent of space or surface; part by Dictionary.com), Choi does not further disclose wherein the first supply line is a power voltage supply line; a second power voltage supply line in the peripheral area, and configured to supply a voltage different from a voltage of the first power voltage supply line; the partition wall overlapping a part of the second power voltage supply line; wherein the second power voltage supply line has the multi-layered structure. However, Lim does disclose wherein the first supply line (VL1) is a power voltage supply line (VL1); a second power voltage supply line (VL2) in the peripheral area, and configured to supply a voltage different from a voltage of the first power voltage supply line (VL1); wherein the first power voltage supply line (VL1) and the second power voltage supply line (VL2) are formed in close proximity to each other (See Fig. 1, Fig. 6, ¶ 0044, ¶ 0087). In view of the teachings of Choi and Lim, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Choi to have wherein the first supply line is a power voltage supply line; a second power voltage supply line in the peripheral area, and configured to supply a voltage different from a voltage of the first power voltage supply line; the partition wall overlapping a part of the second power voltage supply line; wherein the second power voltage supply line has the multi-layered structure because the first and second power voltage supply lines formed simultaneously provide appropriate bias to the plurality of light-emitting diodes in the display area (See Choi and Lim ¶ 0044, ¶ 0087). As to claims 2 and 16, Choi in view of Lim further discloses wherein an end portion of the third conductive layer (215c3) corresponding to the first portion (right FIG. 10) of the (first) power voltage supply line (215c) comprises a tip protruding more than a side surface of the second conductive layer (215c2) corresponding to the first portion (right FIG. 10) (See Choi Fig. 10).
As to claim 3, Choi in view of Lim further discloses wherein an end portion of the first conductive layer (215c1) corresponding to the first portion (right FIG. 10) of the power voltage supply line (215c) comprises a tip protruding more than the side surface of the second conductive layer (215c2) (See Choi Fig. 10).
As to claim 17, Choi in view of Lim further discloses wherein the first conductive layer (215c1) and the third conductive layer (215c3) comprise the same metal as each other, and wherein an end portion of the first conductive layer (215c1) corresponding to the first portion (right FIG. 10) of the first power voltage supply line (215c) comprises a tip protruding more than the side surface of the second conductive layer (215c2) (See Choi Fig. 10, ¶ 0096). As to claims 4 and 18, Choi in view of Lim further discloses wherein a side surface of the third conductive layer (215c3) corresponding to the (a) second portion (left FIG. 10) of the (first) power voltage supply line (215c) (overlapping with the partition wall (219 FIG. 10)) is located on the same inclined surface as a side surface of the second conductive layer (215c2) corresponding to the second portion (left FIG. 10) (See Choi Fig. 10).
As to claim 5, Choi in view of Lim further discloses wherein a side surface of the first conductive layer (215c1) corresponding to the second portion (left FIG. 10) of the power voltage supply line (215c) is located on the same inclined surface as the side surface of the second conductive layer (215c2) (See Choi Fig. 10).
As to claim 19, Choi in view of Lim further discloses wherein the first conductive layer (215c1) and the third conductive layer (215c3) comprise the same metal as each other, and wherein a side surface of the first conductive layer (215c1) corresponding to the second portion (left FIG. 10) of the first power voltage supply line (215c) is located on the same inclined surface as that of the side surface of the second conductive layer (215c2) corresponding to the second portion (left FIG. 10) (See Choi Fig. 10, ¶ 0096).
As to claims 7 and 21, Choi in view of Lim further discloses wherein, in a plan view, (each of) an edge of the (first) power voltage supply line (215c) (and an edge of the second power voltage supply line (215c/VL2) comprises (has) an uneven structure having a concave portion and a convex portion that are alternately arranged (See Choi Fig. 7, Fig. 10).
Claim(s) 6 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2017/0352717 A1 to Choi et al. (“Choi”) and U.S. Patent Application Publication No. 2020/0286965 A1 to Lim et al. (“Lim”) as applied to claims 1 and 15 above, and further in view of U.S. Patent Application Publication No. 2019/0363279 A1 to Yamaguchi et al. (“Yamaguchi”). The teachings of Choi and Lim have been discussed above. As to claims 6 and 20, although Choi in view of Lim discloses the partition wall (217 FIG. 7/219 FIG. 10), and a side surface of the (a) second portion (right FIG. 7/left FIG. 10) of the (first) power voltage supply line (215c) (overlapping with the partition wall (217 FIG. 7/219 FIG. 10)) directly contacts the partition wall (217 FIG. 7/219 FIG. 10) (See Choi Fig. 7, Fig. 10), Choi and Lim do not further disclose wherein the partition wall comprises an organic insulating material. However, Yamaguchi does disclose wherein the partition wall (18) comprises an organic insulating material (182) (See Fig. 3, ¶ 0109-¶ 0113). In view of the teaching of Yamaguchi, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teaching of Choi to have wherein the partition wall comprises an organic insulating material because the combination of inorganic and organic materials as the partition wall prevents the occurrence of cracks and liquid proofing deterioration (See ¶ 0113).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID CHEN whose telephone number is (571)270-7438. The examiner can normally be reached M-F 12-6.
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/DAVID CHEN/Primary Examiner, Art Unit 2815
