DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I, claims 1-10, and 17-20 in the reply filed on 7/14/2026 is acknowledged. Claims 11-16 are withdrawn from consideration.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 5 and 6 recite “a full thickness of the lead frame” in line 2 of each claim. It is unclear whether this is the same thickness as the thickness defined in line 17 of claim 1. For purpose of examination, it is interpreted to be the same.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-8, 10, 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jeon et al. (US 2014/0327122 A1).
Regarding claim 1, Jeon teaches a semiconductor package (package 200 in Figs. 6, 6A with lead frame 100 in Fig. 1 of Jeon; Figs. 1A-5 show different perspective view of the lead frame and package) having top (543 in Fig. 6A) and bottom surfaces (542) and including a vertical direction (up-down direction in Fig. 6-6A) extending from the top surface to the bottom surface, comprising:
a semiconductor die (50 in Fig. 6A);
a lead frame (100 in Fig. 1 of Jeon) comprising:
a die-pad (32) having four sides (as shown in Fig. 1), and a plurality of leads (10-20) having spaces therebetween and around the four sides of the die-pad, spaced apart therefrom and electrically isolated therefrom (as shown in Fig. 1);
wherein the plurality of leads comprises a plurality of first leads (20) and a plurality of second leads (10);
wherein inner lead areas (12 in Fig. 1A) of the plurality of second leads are interleaved with inner lead areas (21 in Fig. 1A) of the plurality of first leads, and offset therefrom in the vertical direction (as shown in Fig. 6, portion 12 of inner lead 10 is offset from the bottom surface 542 of the package where the outer lead 20 is leveled with the bottom surface 542);
wherein the semiconductor die is attached to an upper surface (111 in Fig. 6A) of the die pad;
wherein at least one of any pair of neighboring leads comprises an elongate lug (portion of connecting bar 40 between an inner lead 10 to an adjacent lead 20) in the inner lead areas extending towards the other of the pair of neighboring leads, wherein each lug has a thickness (thickness of connecting bar 40 at the portion 67, which is between two elements 63 in Fig. 1A of Jeon) which is smaller than a full thickness (full thickness of connecting bar 40 is greater than the thickness of portion 67) of the lead frame;
the semiconductor package further comprising molding compound (epoxy molding compound 54 which is described in [0005] and [0063]) encapsulating the semiconductor die and forming the semiconductor package, wherein the molding compound fills the spaces between the leads and fills spaces separating the die pad from the leads (as shown in Figs. 6-6A).
Regarding claim 2, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein each of the plurality of leads comprises an elongate lug (portion 67 in Fig. 1A of Jeon) aligned in a horizontal plane with and extending towards a corresponding elongate lug on a neighboring lead (as shown in Fig. 1A).
Regarding claim 3, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein each of the plurality of leads comprises only one elongate lug (portion 67 in Fig. 1A of Jeon) extending in a first direction (left-right direction in Fig. 1A of Jeon) towards a neighboring lead.
Regarding claim 4, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein the semiconductor package is a Quad Flat Package (QFP) package (as stated in [0005] of Jeon).
Regarding claim 5, Jeon teaches all limitations of the semiconductor package accord to claim 1, and also teaches wherein the thickness of each lug is less than one third of a full thickness of the lead frame (as shown in Fig. 1A of Jeon).
Regarding claim 6, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein the elongate lugs have a uniform thickness which is smaller than a full thickness of the lead frame (as shown in Fig. 1A of Jeon).
Regarding claim 7, Jeon teaches all limitations of the semiconductor package according to claim 1, and further comprising a plurality of bond wires (52 in Fig. 6A of Joen) which electrically connect bonding pads (11 and 21 in Fig. 1A of Jeon) disposed on a top surface of the semiconductor die with respective ones of the plurality of first and second leads.
Regarding claim 8, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein the plurality of first leads are formed into a Gull Wing shape (there is no definition in the claim as to what Gull Wing shape is. In Fig. 9 and [0059] of the published specification of the instant application, the only shape disclosed is that of a straight line. As shown in Fig. 1, 1A and 6A of Jeon, the leads 20 have straight line shape), and the plurality of second leads are formed into a J-lead shape (as indicated in Fig. 3A and 4 of Jeon, the lead 10 has portion 12 offset from the bottom surface of the package and a portion 11 at the level with the bottom surface. Thus, lead 10 has J shape as claimed).
Regarding claim 10, Jeon teaches all limitations of the semiconductor package according to claim 1, and also teaches wherein the molding compound fills spaces below the second plurality of leads (as shown in Fig. 6 of Jeon).
Regarding claim 17, Jeon teaches a lead frame (100 in Fig. 1 of Jeon) for use in a semiconductor device (package 200 in Fig. 6), and having a vertical direction (up-down direction in Fig. 6-6A) extending from a top surface (543 in Fig. 6A) to a bottom surface (542), comprising:
a die pad (32) having four sides (as shown in Fig. 1);
a plurality of leads (10-20) having spaces therebetween and around the four sides of the die-pad, spaced apart therefrom and electrically isolated therefrom (as shown in Fig. 1);
wherein at least one of each pair of neighboring leads comprises a beam (connecting bar 40, as shown in Fig. 1A) extending in a first direction (horizontal portion in Fig. 1A of Jeon) towards the other of the pair of neighboring leads, wherein each beam has a thickness (thickness of portion 63 in the vertical direction of the connecting bar 40) which is smaller than a full thickness of the lead frame (full thickness in the vertical direction of connecting bar 40 is greater than the thickness of the recessed portion 63).
Regarding claim 18, Jeon teaches all limitations of the lead frame according to claim 17, and also teaches wherein each beam has a uniform thickness (as shown in Fig. 1A of Jeon, the thickness of the recessed portion 63 is uniform).
Regarding claim 19, Jeon teaches all limitations of the lead frame according to claim 17, and also teaches wherein each beam has a uniform width along a length of the beam (as shown in Fig. 1A of Jeon, the width of the portion 67 is uniform along a length portion of the portion 67 is uniform).
Regarding claim 20, Jeon teaches all limitations of the lead frame according to claim 17, and also teaches wherein a middle region (region of the cross-shape 62 in Fig. 1A of Jeon) of each beam has a width (width of portion 67 is smaller than that of the connecting bar 40) which is smaller than the width of other part of the beam.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Jeon, and further in view of Ko (US 2020/0211934 A1).
Regarding claim 9, Jeon teaches all limitations of the semiconductor package according to claim 1, but does not explicitly teach wherein the thickness of the lead frame is ‘a’ of 0.127mm, a distance between the pair of neighboring first and second leads is ‘b’ of 0.3mm, and a down-set ‘c’ is in a range of 0.3mm to 0.5mm.
Jeon discloses that the distance between the first and second leads is in the range of 0.25mm to 0.85mm and the thickness of the lead frame is in the range of 0.15mm to 0.25mm (see [0051] of Jeon).
These ranges overlaps the thickness of the lad frame and the distance between the first and second leads, thus, a prima facie case of obviousness exists
Therefore, it would have been obvious at the effective filing date of the claimed invention to a person having ordinary skill in the art to have made the thickness of the lead frame is ‘a’ of 0.127mm, a distance between the pair of neighboring first and second leads is ‘b’ of 0.3mm since these are known working values for the thickness and pitch of the leads in the leadframe. See In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997).
But Jeon does not teach the semiconductor package a down-set ‘c’ is in a range of 0.3mm to 0.5mm.
Ko teaches the vertical offset of the die pad and the leads is at least 0.2 mm (see Abstract and [0010] of Ko).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have made the down-set to be at least 0.2mm in order to reduce the E field in use by increasing the mold compound thickness under the leadframe which increase the mechanical strength of the mold.
As incorporated, since the claimed range of 0.3mm to 0.5mm "overlaps or lies inside ranges disclosed by the prior art", thus, a prima facie case of obviousness exists.
Therefore, it would have been obvious at the effective filing date of the claimed invention to a person having ordinary skill in the art to have made the down-set ‘c’ is in a range of 0.3mm to 0.5mm. See In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 1469-71, 43 USPQ2d 1362, 1365-66 (Fed. Cir. 1997).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN A HOANG whose telephone number is (571)270-0406. The examiner can normally be reached Monday-Friday 8-9am, 10am-6pm EST.
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/Tuan A Hoang/ Primary Examiner, Art Unit 2898
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