Prosecution Insights
Last updated: October 04, 2026
Application No. 18/609,890

Photodiodes

Non-Final OA §103
Filed
Mar 19, 2024
Priority
Mar 20, 2023 — GB 2304001.7 +2 more
Examiner
LOHAKARE, PRATIKSHA JAYANT
Art Unit
Tech Center
Assignee
X-Fab Global Services GmbH
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
79 granted / 96 resolved
+22.3% vs TC avg
Strong +15% interview lift
Without
With
+15.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
37 currently pending
Career history
122
Total Applications
across all art units

Statute-Specific Performance

§103
65.2%
+25.2% vs TC avg
§102
16.5%
-23.5% vs TC avg
§112
13.7%
-26.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 96 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Invention II (claims 10-17) in the reply filed on 09/02/2026 is acknowledged. Invention I- claims 1-9 are cancelled without prejudice. Claims 10-17 are pending in this application. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the claim 1, line 6 recites “a wavelength-selective absorption layer” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 10, 13-17 are rejected under 35 U.S.C. 103 as being unpatentable over Uchihashi et al (US 2017/0294474A1) in view of Joei et al (US 20160372520A1). Re claim 10 Uchihashi teaches a method of forming an optical sensor (1, fig 1), the method comprising: providing a semiconductor wafer (substrate, fig 1) [0047] comprising a semiconductor layer (P-type P_sub, fig 1) [0048]; forming, in the semiconductor layer (P_sub, fig 1) [0048], a first photodiode (PD2, fig 1) [0045] comprising a first light sensitive area (central area of PD2, fig 1) [0047] ; and forming, in the semiconductor layer (P-type P_sub, fig 1), a second photodiode (PD1, fig 1) [0045] comprising a second light sensitive area (central area for PD1, fig 1) and a wavelength-selective absorption layer (11, fig 1) [0060] arranged to selectively attenuate incident light before the incident light enters the light sensitive area ( the UV cut filter preferably block light in the ultra violet region and serve as a serving as an interference film cutting a wavelength) [0088] of the second photodiode (PD1, fig 1) [0060], wherein the wavelength-selective absorption layer (11, fig 1) [0095] is characterized by a low optical absorption in a wavelength range of 300 to 1100 nanometers (nm). (300 to 400 nm) [0095], and wherein the first photodiode (PD2, fig1) and the second photodiode (PD1, fig 1) are formed to, when in use, generate respective electrical currents in response to the incident light (the photocurrent lin1(PD1)/lin2 (PD2) to flow depending on the intensity of incident light) [0045], and the optical sensor (1, fig1) is configured to, when in use, determine a light level based on a discrepancy between the electrical current generated by the first photodiode (PD2, fig 1) and the electrical current generated by the second photodiode (PD1, fig 1) (detecting the intensity of the light based on the photocurrent ) [0044]. Uchihashi does not teach the wavelength-selective absorption layer is characterized by a high optical absorption in a wavelength range of 200 to 275 nm. Joei does teach the wavelength-selective absorption layer (silicon nitride layer 18, fig 1) [0072]is characterized by a high optical absorption in a wavelength range of 200 to 275 nm, (ultraviolet absorption film <400, or less may be approximately 80% or less) [0072]. It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by Joei into the structure of Uchihashi to include the wavelength-selective absorption layer is characterized by a high optical absorption in a wavelength range of 200 to 275 nm as claimed. The ordinary artisan would have been motivated to modify Uchihashi based on the teaching of Joei in the above manner doing so, deterioration of the organic photoelectric conversion layer is reduced, and yields of the image pickup device are stabilized [0100]. Furthermore, it has been held that where then general conditions of a claim are disclosed in the prior art, discovering the optimum or workable range involves only routine skill in the art. In re Aller, 105 USPQ 233. Re claim 13 Uchihashi in view of Joie teach the method of claim 10, wherein the wavelength-selective absorption layer (11, fig 1) [0090]is an electrically insulating passivation layer (SiO2, TiO2, Al2O2) [ 0090, 0109]. Re claim 14 Uchihashi in view of Joie the method of claim 13, wherein the electrically insulating passivation layer comprises silicon nitride (18, fig 1) [Joie, 0072]. Re claim 15 Uchihashi in view of Joie the method of claim 14, wherein the electrically insulating passivation layer is made of silicon nitride (Silicon nitride, 18) [Joie , 0072]. Re claim 16 Uchihashi in view of Joie the method of claim 10, wherein an optical transmission of the wavelength-selective absorption layer is less than 70% in a wavelength range of 200 to 275 nm.(transmittance of light of a wavelength of approximately 400 nm or less may be approximately 80% or less.) [Joie, 0072]. Re claim 17 Uchihashi in view of Joie the method of claim 10, wherein an optical transmission of the wavelength-selective absorption layer is greater than 70% in a wavelength range of 300 to 1100 nm. (transmittance of light of a wavelength of approximately 400 nm or less may be approximately 80% or less.) [Joie, 0072]. Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Uchihashi modified by Joie as applied to claim 10 and further in view of Stevens et al (US20100140668A1). Re claim 11 Uchihashi in view of Joie teaches the method of claim 10, wherein each of the first photodiode (PD2, fig 1) and the second photodiode (PD1, fig 1) is formed by: performing a first doping step [0048] to form a first well (N_well, fig 1) [0048] in the semiconductor layer (P_Sub) [0048] having a first type of doping (N-type); performing a second doping step [0048] to form a second well (P-Well, fig 1) having a second type of doping (P-type), so as to form a pn-junction (PD2 _vis, fig 1) of the first photodiode (PD2, fig 1) [0052] or the second photodiode between the first well and the second well; performing a shallow trench isolation (STI, fig 1) [0070] of the semiconductor layer in the second well (P_Well) [0070]; forming a first contact (right contact hole, fig 1) [0073] for contacting the first well (N-Well) and forming a second contact (middle right contact, fig 1) [0073] for contacting the second well (P_Well, fig 1) in order to apply a voltage across the pn- junction (PD2_vis, fig 1) when in use; and forming a backend stack (16abc/13abcd/14ab/15ab, fig 1) [0058] comprising a plurality of metal layers (14ab/15ab, fig 1)[0074] separated by interdielectric layers (13abcd, fig 1), and the wavelength-selective absorption layer (11, fig 1), wherein forming the second photodiode (PD1, fig 1) further comprises locally removing the wavelength-selective absorption layer (11, fig 1) in a region overlapping the pn-junction (PD1_vis). Uchihashi and Joie do not teach performing the shallow trench isolation etch to form a plurality of trenches in a surface of the semiconductor layer in the second well performing a third doping step by injecting dopants at a first angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of trenches in the second well; performing a fourth doping step by injecting dopants at a second angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at a bottom of the plurality of trenches in the second well; performing a fifth doping step to increase a doping concentration of the second type of doping at the surface of the semiconductor layer between the plurality of trenches in the second well. Stevens teaches performing the shallow trench isolation etch [0039] to form a plurality of trenches (left 712/right 712, fig 7D) [0039] in a surface of the semiconductor layer (702, fig 7D) [0038] in the second well, performing a third doping step (fig 7F) [0040] by injecting dopants (implanting dopant) [0040] at a first angle (left arrow, fig 7F) relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of trenches (712, fig 7F) in the second well; performing a fourth doping step (fig 7F) by injecting dopants [0040] at a second angle (right angle, fig 7F) relative to the surface of the semiconductor wafer (fig 7F) in order to increase a doping concentration of the second type of doping at a bottom of the plurality of trenches in the second well; [0040]. performing a fifth doping step (fig 7G) to increase a doping concentration [0042] of the second type of doping at the surface of the semiconductor layer between the plurality of trenches in the second well (702, fig 7). It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by stevens into the structure of Uchihashi and Joie to include performing the shallow trench isolation etch to form a plurality of trenches in a surface of the semiconductor layer in the second well performing a third doping step by injecting dopants at a first angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of trenches in the second well; performing a fourth doping step by injecting dopants at a second angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at a bottom of the plurality of trenches in the second well; performing a fifth doping step to increase a doping concentration of the second type of doping at the surface of the semiconductor layer between the plurality of trenches in the second well as claimed. The ordinary artisan would have been motivated to modify Uchihashi and Joie based on the teaching of Stevens in the above manner for the purpose of improving the collection efficiency of the photodetector [0009]. It has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced, In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). Re claim 12 Uchihashi and Joie teaches the method of claim 10, wherein each of the first photodiode (PD2, fig 1) [0048] and the second photodiode (PD1, fig 1) is formed by: performing a first doping step [0048] to form a first well (N_well, fig 1) [0048] in the semiconductor layer (P_Sub) [0048] having a first type of doping (N-type); performing a second doping step [0048] to form a second well (P-Well, fig 1) having a second type of doping (P-type), so as to form a pn-junction (PD2 _vis, fig 1) of the first photodiode (PD2, fig 1) [0052] or the second photodiode between the first well and the second well; performing a shallow trench isolation (STI, fig 1) [0070] to form a plurality of raised portions (portions between STI, fig 1) of semiconductor material(N_well/P_well, fig 1) in a surface of semiconductor layer (P-Sub, fig 1) in the second well (P_Well, fig 1) [0070]; forming a first contact (right contact hole, fig 1) [0073] for contacting the first well (N-Well) and forming a second contact (middle right contact, fig 1) [0073] for contacting the second well (P_Well, fig 1) in order to apply a voltage across the pn- junction (PD2_vis, fig 1) when in use; and forming a backend stack (16abc/13abcd/14ab/15ab, fig 1) [0058] comprising a plurality of metal layers (14ab/15ab, fig 1)[0074] separated by interdielectric layers (13abcd, fig 1), and the wavelength-selective absorption layer (11, fig 1), wherein forming the second photodiode (PD1, fig 1) further comprises locally removing the wavelength-selective absorption layer (11, fig 1) in a region overlapping the pn-junction (PD1_vis). Uchihashi and Joie do not teach the shallow trench isolation etch to form the plurality of raised portions of semiconductor material in a surface of the semiconductor layer in the second well; performing a third doping step by injecting dopants at a first angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of raised portions in the second well; performing a fourth doping step by injecting dopants at a second angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping between the plurality of raised portions in the second well; performing a fifth doping step to increase a doping concentration of the second type of doping at the surface of the semiconductor layer at a top of the plurality of raised portions in the second well; Stevens teaches the shallow trench isolation etch [0039] to form the plurality of raised portions (side portions of the trench, fig 7D) [0039] of semiconductor material in a surface of the semiconductor layer (702, fig 7D) [0039] in the second well; performing a third doping step by injecting dopants at a first angle (left side arrow 718, fig 7F) [0040] relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of raised portions in the second well [0040] (implant dopants into the side wall and bottom surfaces of trenches) [0040]; performing a fourth doping step [0040] by injecting dopants at a second angle (right side arrow 718, fig 7F) [0040] relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping between the plurality of raised portions in the second well ] (implant dopants into the side wall and bottom surfaces of trenches) [0040]; performing a fifth doping step (fig 7G) [0041] to increase a doping concentration of the second type of doping at the surface of the semiconductor layer at a top of the plurality of raised portions in the second well (to implant dopants around and into STI regions) [0042]; It would have been obvious to one ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teaching taught by Stevens into the structure of Uchihashi and Joie to include the shallow trench isolation etch [0039] to form the plurality of raised portions of semiconductor material in a surface of the semiconductor layer in the second well; performing a third doping step by injecting dopants at a first angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping at along sides of the plurality of raised portions in the second well; performing a fourth doping step by injecting dopants at a second angle relative to the surface of the semiconductor wafer in order to increase a doping concentration of the second type of doping between the plurality of raised portions in the second well; performing a fifth doping step to increase a doping concentration of the second type of doping at the surface of the semiconductor layer at a top of the plurality of raised portions in the second well as claimed. The ordinary artisan would have been motivated to modify Uchihashi and Joie in the above manner based on the teaching of Stevens for the purpose of improving the collection efficiency of the photodetector [0009]. It has been held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced, In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gäbler et al (US 20240322054 A1) teaches an optical UV sensor a first photodiode sensitive to light in a first wavelength range and to light in a second wavelength range in the UV spectrum. Yamamoto et al (US 20160086989 A1) teaches UV Sensor For UV Detecting Device, Has Filter Film Arranged On First Set Of Pixel Regions To Cover First Pixel Region Except On Second Pixel Region, And Resistor In Pixel Regions Connected Through Signal Lines To Output Terminals. Miura et al (US20080237763A1) teaches ultraviolet detecting device comprises silicon semiconductor layer formed over insulating layer, lateral PN-junction photodiodes, interlayer insulating film formed over semiconductor layer and silicon nitride filter layer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRATIKSHA J LOHAKARE whose telephone number is (571)270-1920. The examiner can normally be reached Monday - Friday 7.30 am-4.30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at 571-270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PRATIKSHA JAYANT LOHAKARE/Examiner, Art Unit 2818 /DUY T NGUYEN/Primary Examiner, Art Unit 2818 9/16/26
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Prosecution Timeline

Mar 19, 2024
Application Filed
Sep 18, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
98%
With Interview (+15.3%)
3y 2m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 96 resolved cases by this examiner. Grant probability derived from career allowance rate.

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