Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Election/Restrictions
1. Applicant's election, without traverse, of claims 1-18 in the “Response to Restriction Requirement” filed on 06/30/2026 is acknowledged and entered by the Examiner.
This office action considers claims 1-32 pending for prosecution, wherein claims 19-32 are withdrawn from further consideration, and claims 1-18 are presented for examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
2. Claim 13 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to
particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Regarding Claim 13, the instant claim recites limitations in view of intervening claim 11 and parent device claim 1, wherein the metes and bounds of the claimed method are vague and ill-defined as a result of uncertainty in the different boundaries and new limitations “wherein the barrier layer further includes a diffusion barrier located between the amorphous barrier and the resistance barrier” (Claim 13; emphasis added). The claim is indefinite because of the following:
i) The claim is indefinite because “wherein the barrier layer further includes a diffusion barrier located between the amorphous barrier and the resistance barrier” (Claim 13) lacks proper antecedent basis. There is no recitation of “a barrier layer” in either of claims 1, 11, or 13.. Thus, it is not clear what is intended by “the barrier layer”. Therefore, the limitation of “wherein the barrier layer further includes a diffusion barrier located between the amorphous barrier and the resistance barrier” (Claim 13) is indefinite and unclear.
The specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, whereby the claims are rendered indefinite. Therefore, the resulting claim is indefinite and is failing to particularly point out and distinctly claim the subject matter. Appropriate clarification and/or correction are/is required within metes and bounds of the claimed invention.
As there is a great deal of confusion and uncertainty as to the proper interpretation of the limitations of the claim, it would not be proper for the examiner to reject such a claim on the basis of prior art. See MPEP § 706 and MPEP § 2173.II (second) wherein In re Steele, 305 F.2d 859, 134 USPQ 292 (CCPA 1962), a rejection under 35 U.S.C. 103 should not be based on considerable speculation about the meaning of terms employed in a claim or assumptions that must be made as to the scope of the claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (100; Fig 3A; [0063]) = (element 100; Figure No. 3A; Paragraph No. [0063]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
3. Claims 1-3, 5, and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US 20130221307 A1; hereinafter Wang).
Regarding claim 1, Wang teaches a semiconductor device (see the entire document, specifically Fig. 1+; [0015+], and as cited below), comprising:
an access line (118; Fig. 4; [0027]);
a variable resistance layer (206; Fig. 4; [0032-0033]);
an electrode (108; Fig. 4; [0035]) located between the access line (118; Fig. 4; [0027]) and the variable resistance layer (206; Fig. 4; [0032-0033]); and
a barrier structure ({501, 502}; Fig. 4; [0039-0040]) located between the access line (118; Fig. 4; [0027]) and the electrode (108; Fig. 4; [0035]) and including an amorphous barrier ({502}; Fig. 4; [0045]).
Regarding claim 2, Wang teaches all of the features of claim 1.
Wang further teaches wherein the barrier structure ({501, 502}; Fig. 4; [0039-0040]) further includes a diffusion barrier ({501}; Fig. 4; see [0040, 0043]), and the amorphous barrier ({502}; Fig. 4; [0045]) has a resistivity higher (see [0045, 0043, 0040]) than that of the diffusion barrier ({501}; Fig. 4; see [0040, 0043]).
Regarding claim 3, Wang teaches all of the features of claim 2.
Wang further teaches wherein the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) is located between the amorphous barrier ({502}; Fig. 4; [0045]) and the access line (118; Fig. 4; [0027]).
Regarding claim 5, Wang teaches all of the features of claim 2.
Wang further teaches wherein the amorphous barrier ({502}; Fig. 4; [0045]) is located between the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) and the electrode (108; Fig. 4; [0035]).
Regarding claim 14, Wang teaches a semiconductor device (see the entire document, specifically Fig. 1+; [0015+], and as cited below), comprising:
a first access line (118; Fig. 4; [0027]);
a second access line (102; Fig. 4; [0027]) intersecting the first access line (118; Fig. 4; [0027]);
a memory cell (112; Fig. 4; [0027]) connected between the first access line (118; Fig. 4; [0027]) and the second access line (102; Fig. 4; [0027]) and including a variable resistance layer (206; Fig. 4; [0032-0033]);
a crystalline barrier ({501}; Fig. 4; see [0040, 0043]) located between the memory cell (112; Fig. 4; [0027]) and the first access line (118; Fig. 4; [0027]); and
an amorphous barrier ({502}; Fig. 4; [0045]) located between the crystalline barrier ({501}; Fig. 4; see [0040, 0043]) and the memory cell (112; Fig. 4; [0027]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
4. Claims 4, 11-13, and 15-16 are rejected under 35 U.S.C.103 as being unpatentable over Wang et al. (US 20130221307 A1; hereinafter Wang), in view of Lee et al. (US 20200365657 A1; hereinafter Lee).
Regarding claim 4, Wang teaches all of the features of claim 2.
Wang further teaches wherein the barrier structure ({501, 502}; Fig. 4; [0039-0040]) (see below for “further includes a resistance barrier located between”) the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) and the access line (118; Fig. 4; [0027]), and (see below for “the resistance barrier has a resistivity higher than that of”) the amorphous barrier ({502}; Fig. 4; [0045]).
As noted above, Wang does not expressly disclose “wherein the barrier structure further includes a resistance barrier located between the diffusion barrier and the access line, and the resistance barrier has a resistivity higher than that of the amorphous barrier”.
However, in the analogous art, Lee teaches a memory circuit or device, and an application thereof in an electronic device ([0002]), wherein (Fig. 1A+; [0002 interface layers ({21A, 21B}; Fig. 2C; [0042]) comprise of tungsten silicon nitride (WSiNx), where interface layer ({21A}; Fig. 2C; [0042]) is between interface layer ({21B}; Fig. 2C; [0042]) and row lines (10; Fig. 2C; [0042]), where ({21A}; Fig. 2C; [0042]) comprises of tungsten silicon nitride (WSiNx).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Lee’s interface layer comprising of tungsten silicon nitride (WSiNx) into Wang’s device, and thereby, modified Wang’s (by Lee) device will have wherein the barrier structure (Wang {501, 502}; Fig. 4; [0039-0040]) further includes a resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]) located between the diffusion barrier (Wang {501}; Fig. 4; see [0040, 0043]) and the access line (Wang 118; Fig. 4; [0027]), and the resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]; with a material of tungsten silicon nitride (WSiNx)) has a resistivity higher than that of the amorphous barrier (Wang {502}; Fig. 4; [0045, 0048]).
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides an interface layer comprising of tungsten silicon nitride (WSiNx) between a row line and another resistance layer (Lee [0042]), where an interface layer comprising of tungsten silicon nitride (WSiNx) further increases the resistance of the structure and further protects the device.
Regarding claim 11, Wang teaches all of the features of claim 1.
Wang further teaches wherein the barrier structure ({501, 502}; Fig. 4; [0039-0040]) further includes (see below for “a resistance barrier located”) between the amorphous barrier ({502}; Fig. 4; see [0045]) and the access line (118; Fig. 4), and (see below for “the resistance barrier”) has a resistivity higher than that of the amorphous barrier ({502}; Fig. 4; see [0045]).
As noted above, Wang does not expressly disclose “wherein the barrier structure further includes a resistance barrier located between the amorphous barrier and the access line, and the resistance barrier has a resistivity higher than that of the amorphous barrier”.
However, in the analogous art, Lee teaches a memory circuit or device, and an application thereof in an electronic device ([0002]), wherein (Fig. 1A+; [0002 interface layers ({21A, 21B}; Fig. 2C; [0042]) comprise of tungsten silicon nitride (WSiNx), where interface layer ({21A}; Fig. 2C; [0042]) is between interface layer ({21B}; Fig. 2C; [0042]) and row lines (10; Fig. 2C; [0042]), where ({21A}; Fig. 2C; [0042]) comprises of tungsten silicon nitride (WSiNx).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Lee’s interface layer comprising of tungsten silicon nitride (WSiNx) into Wang’s device, and thereby, modified Wang’s (by Lee) device will have wherein the barrier structure (Wang {501, 502}; Fig. 4; [0039-0040]) further includes a resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]) located between the amorphous barrier (Wang {502}; Fig. 4; [0045, 0048]) and the access line (Wang 118; Fig. 4; [0027]), and the resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]; with a material of tungsten silicon nitride (WSiNx)) has a resistivity higher than that of the amorphous barrier (Wang {502}; Fig. 4; [0045, 0048]).
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides an interface layer comprising of tungsten silicon nitride (WSiNx) between a row line and another resistance layer (Lee [0042]), where an interface layer comprising of tungsten silicon nitride (WSiNx) further increases the resistance of the structure and further protects the device.
Regarding claim 12, modified Wang (by Lee) teaches all of the features of claim 11.
Modified Wang (by Lee) further teaches wherein the resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]; with a material of tungsten silicon nitride (WSiNx)) includes a tungsten silicon nitride layer.
Regarding claim 13, modified Wang (by Lee) teaches all of the features of claim 11.
Modified Wang (by Lee) further teaches wherein the barrier layer (see section 2, above; 112(b) rejection) further includes a diffusion barrier (Wang {501}; Fig. 4; [0040]) located between the amorphous barrier (Wang {502}; Fig. 4; [0045, 0048]) and the resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]; with a material of tungsten silicon nitride (WSiNx)).
Regarding claim 15, Wang teaches all of the features of claim 14.
Wang further teaches further comprising (see below for “a resistance barrier located between”) the crystalline diffusion barrier ({501}; Fig. 4; see [0040, 0043]) and the access line (118; Fig. 4; [0027]).
As noted above, Wang does not expressly disclose “a resistance barrier located between the crystalline diffusion barrier and the access line”.
However, in the analogous art, Lee teaches a memory circuit or device, and an application thereof in an electronic device ([0002]), wherein (Fig. 1A+; [0002 interface layers ({21A, 21B}; Fig. 2C; [0042]) comprise of tungsten silicon nitride (WSiNx), where interface layer ({21A}; Fig. 2C; [0042]) is between interface layer ({21B}; Fig. 2C; [0042]) and row lines (10; Fig. 2C; [0042]), where ({21A}; Fig. 2C; [0042]) comprises of tungsten silicon nitride (WSiNx).
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Lee’s interface layer comprising of tungsten silicon nitride (WSiNx) into Wang’s device, and thereby, modified Wang’s (by Lee) device will have a resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]) the crystalline diffusion barrier (Wang {501}; Fig. 4; see [0040, 0043]) and the access line (Wang 118; Fig. 4; [0027]).
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides an interface layer comprising of tungsten silicon nitride (WSiNx) between a row line and another resistance layer (Lee [0042]), where an interface layer comprising of tungsten silicon nitride (WSiNx) further increases the resistance of the structure and further protects the device.
Regarding claim 16, modified Wang (by Lee) teaches all of the features of claim 15.
Modified Wang (by Lee) further teaches wherein the resistance barrier (in view of Lee {21A}; Fig. 2C; [0042]; with a material of tungsten silicon nitride (WSiNx)) includes a tungsten silicon nitride layer.
5. Claims 6, 9, and 17-18 are rejected under 35 U.S.C.103 as being unpatentable over Wang et al. (US 20130221307 A1; hereinafter Wang), in view of Chu et al. (US 20180375024 A1; hereinafter Chu).
Regarding claim 6, Wang teaches all of the features of claim 2.
Wang further teaches wherein the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) (see below for “includes metal nitride”), and the amorphous barrier ({502}; Fig. 4; see [0045]) (see below for “includes metal oxynitride”).
As noted above, Wang does not expressly disclose “wherein the diffusion barrier includes metal nitride, and the amorphous barrier includes metal oxynitride”.
However, in the analogous art, Chu teaches a memory device ([Abstract]), wherein (Fig. 1A+; [0002]) a first oxygen barrier layer (404a; Fig. 4; [0035]) may comprise titanium nitride, a second oxygen barrier layer (404b; Fig. 4; [0035]) may comprise hafnium oxynitride
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wang’s materials of the barrier layers in view of Chu’s materials of the barrier layers, and thereby, modified Wang’s (by Chu) device will have wherein the diffusion barrier ({501}; Fig. 4; see [0040, 0043] (in view of material of Chu 404a; Fig. 4; [0035]; titanium nitride) includes metal nitride (in view of material of Chu 404a; Fig. 4; [0035]; titanium nitride), and the amorphous barrier ({502}; Fig. 4; see [0045]; in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride) includes metal oxynitride (in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride).
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides a first barrier layer comprising titanium nitride and a second barrier layer comprising hafnium oxynitride (Chu [0035]), which are reliable barrier materials that will help further protect the device.
Regarding claim 9, Wang teaches all of the features of claim 1.
Wang further teaches wherein the amorphous barrier ({502}; Fig. 4; see [0045]) (see below for “includes at least one of metal oxynitride, graphene oxide, and reduced graphene oxide”).
As noted above, Wang does not expressly disclose “wherein the amorphous barrier includes at least one of metal oxynitride, graphene oxide, and reduced graphene oxide”.
However, in the analogous art, Chu teaches a memory device ([Abstract]), wherein (Fig. 1A+; [0002]) a first oxygen barrier layer (404a; Fig. 4; [0035]) may comprise titanium nitride, a second oxygen barrier layer (404b; Fig. 4; [0035]) may comprise hafnium oxynitride
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wang’s materials of the barrier layers in view of Chu’s materials of the barrier layers, and thereby, modified Wang’s (by Chu) device will have wherein the amorphous barrier ({502}; Fig. 4; see [0045]; in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride) includes at least one of metal oxynitride (in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride), graphene oxide, and reduced graphene oxide.
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides a second barrier layer comprising hafnium oxynitride (Chu [0035]), which is a reliable barrier material that will help further protect the device.
Regarding claim 17, Wang teaches all of the features of claim 14.
Wang further teaches wherein the amorphous barrier ({502}; Fig. 4; see [0045]) (see below for “includes at least one of metal oxynitride, graphene oxide, and reduced graphene oxide”).
As noted above, Wang does not expressly disclose “wherein the amorphous barrier includes at least one of metal oxynitride, graphene oxide, and reduced graphene oxide”.
However, in the analogous art, Chu teaches a memory device ([Abstract]), wherein (Fig. 1A+; [0002]) a first oxygen barrier layer (404a; Fig. 4; [0035]) may comprise titanium nitride, a second oxygen barrier layer (404b; Fig. 4; [0035]) may comprise hafnium oxynitride
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wang’s materials of the barrier layers in view of Chu’s materials of the barrier layers, and thereby, modified Wang’s (by Chu) device will have wherein the amorphous barrier ({502}; Fig. 4; see [0045]; in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride) includes at least one of metal oxynitride (in view of material of Chu 404b; Fig. 4; [0035]; hafnium oxynitride), graphene oxide, and reduced graphene oxide.
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides a second barrier layer comprising hafnium oxynitride (Chu [0035]), which is a reliable barrier material that will help further protect the device.
Regarding claim 18, Wang teaches all of the features of claim 14.
Wang further teaches wherein the crystalline barrier ({501}; Fig. 4; see [0040, 0043]) (see below for “includes at least one of metal nitride and graphene”).
As noted above, Wang does not expressly disclose “wherein the crystalline barrier includes at least one of metal nitride and graphene”.
However, in the analogous art, Chu teaches a memory device ([Abstract]), wherein (Fig. 1A+; [0002]) a first oxygen barrier layer (404a; Fig. 4; [0035]) may comprise titanium nitride, a second oxygen barrier layer (404b; Fig. 4; [0035]) may comprise hafnium oxynitride
It would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to modify Wang’s materials of the barrier layers in view of Chu’s materials of the barrier layers, and thereby, modified Wang’s (by Chu) device will have wherein the crystalline barrier ({501}; Fig. 4; see [0040, 0043] (in view of material of Chu 404a; Fig. 4; [0035]; titanium nitride) includes at least one of metal nitride and graphene (in view of material of Chu 404a; Fig. 4; [0035]; titanium nitride).
The ordinary artisan would have been motivated to modify Wang in the manner set forth above, at least, because this inclusion provides a first barrier layer comprising titanium nitride (Chu [0035]), which is a reliable barrier material that will help further protect the device.
6. Claims 7-8 and 10 are rejected under 35 U.S.C.103 as being unpatentable over Wang et al. (US 20130221307 A1; hereinafter Wang), in view of the following statement(s).
Regarding claim 7, Wang teaches all of the features of claim 2.
Wang further teaches wherein the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) (see below for “includes graphene”), and the amorphous barrier ({502}; Fig. 4; see [0045]) (see below for “includes graphene oxide”).
As noted above, Wang does not expressly disclose “wherein the diffusion barrier includes graphene, and the amorphous barrier includes graphene oxide”.
However, the instant specification contains no disclosure of either the critical nature of the claimed “wherein the diffusion barrier includes graphene, and the amorphous barrier includes graphene oxide” or of any unexpected results arising therefrom. Rather, the instant invention provides alternative materials as stated in Claim 6 of the instant invention that states “wherein the diffusion barrier includes metal nitride, and the amorphous barrier includes metal oxynitride”. Where patentability is aid to be based upon particular chosen compositions or upon another variable recited in a claim, the applicant must show that the chosen compositions are critical. (.In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).).
Regarding claim 8, Wang teaches all of the features of claim 2.
Wang further teaches wherein the diffusion barrier ({501}; Fig. 4; see [0040, 0043]) (see below for “includes graphene”), and the amorphous barrier ({502}; Fig. 4; see [0045]) (see below for “includes reduced graphene oxide”).
As noted above, Wang does not expressly disclose “wherein the diffusion barrier includes graphene, and the amorphous barrier includes reduced graphene oxide”.
However, the instant specification contains no disclosure of either the critical nature of the claimed “wherein the diffusion barrier includes graphene, and the amorphous barrier includes reduced graphene oxide” or of any unexpected results arising therefrom. Rather, the instant invention provides alternative materials as stated in Claim 6 of the instant invention that states “wherein the diffusion barrier includes metal nitride, and the amorphous barrier includes metal oxynitride”. Where patentability is aid to be based upon particular chosen compositions or upon another variable recited in a claim, the applicant must show that the chosen compositions are critical. (.In re Woodruff, 919 F.2d 1575, 1578 (Fed. Cir. 1990).).
Regarding claim 10, Wang teaches all of the features of claim 1.
Wang further teaches wherein the barrier structure ({501, 502}; Fig. 4; [0039-0040]) includes (see below for “a plurality of”) diffusion barriers ({501}; Fig. 4; [0039-0040]) and (see below for “a plurality of”) amorphous ({502}; Fig. 4; [0039-0040]) barriers that are alternately stacked (see [0039]).
Although Wang does not expressly disclose “wherein the barrier structure includes a plurality of diffusion barriers and a plurality of amorphous barriers that are alternately stacked”, the court held that mere duplication of parts has no patentable significance unless a new and unexpected result is produced (In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960) See MPEP § 2144.04 VI. B.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Omar Mojaddedi whose telephone number is 313-446-6582. The examiner can normally be reached on Monday – Friday, 8:00 a.m. to 4:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado, can be reached on 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/OMAR F MOJADDEDI/Examiner, Art Unit 2898
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