DETAILED ACTION
This Office action is in response to the amendment filed 7 November 2025. By this amendment, claims 1, 3-6, and 12-15 are amended. Claims 1-15 are currently pending; claims 11-15 stand withdrawn.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 7 November 2025 have been fully considered but they are not persuasive; the rejections of the claims have been modified in response to Applicant’s amendments to the claims. The amended limitations and Applicant’s arguments regarding the amended limitations are addressed by the modified rejections below.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites the limitation "the second mounting side of the electrically insulative frame" (emphasis added) in lines 2-3. There is insufficient antecedent basis for this limitation in the claim. For the purposes of examination, it is assumed this limitation is intended to refer to --the second mounting side of the power semiconductor module-- as recited in claim 1, from which claim 6 depends.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 6-8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2017/0316992 A1 to Spann (hereinafter “Spann”).
Regarding independent claim 1, Spann (Fig. 6) discloses a power electronic assembly, comprising:
a power semiconductor module (frame 2 and semiconductor device assembly within; ¶¶ 0018-19);
a metal base plate 3 (¶ 0018) attached to a first mounting side (bottom) of the power semiconductor module at a plurality of first fixing positions (Fig. 6 - attached at 69/70, ¶ 0031);
a plurality of openings (Fig. 6 - 69/70 disposed therein, ¶ 0031) in the metal base plate 3 and vertically aligned with the plurality of first fixing positions (Fig. 6); and
a circuit board 67 (¶ 0031; Fig. 6) attached to a second mounting side (top) of the power semiconductor module opposite the first mounting side at a plurality of second fixing positions (including positions at 48/49), wherein a plurality of electrically insulative protrusions 48/49 (¶ 0022) jut out from the second mounting side of the power semiconductor module, wherein the plurality of electrically insulative protrusions 48/49 is vertically aligned with the plurality of first fixing positions (the plurality of electrically insulative protrusions is disposed parallel to and at a distance relative to the plurality of first fixing positions, thus are “vertically aligned”) and the plurality of openings in the metal base plate 3 (Fig. 6).
Regarding claim 6, as best understood, Spann (Figs. 2, 6) discloses the power electronic assembly of claim 1, wherein the plurality of electrically insulative protrusions 48/49 allows attachment of the circuit board 67 to the second mounting side (top) of the electrically insulative frame 2 only in a single orientation (Fig. 6).
Regarding claim 7, Spann (Figs. 2, 6) discloses the power electronic assembly of claim 1, wherein the plurality of electrically insulative protrusions 48/49 jut out from the second mounting side (top) of the power semiconductor module at the plurality of second fixing positions (e.g., positions at 48/49), and wherein the circuit board 67 is attached to the second mounting side of the power semiconductor module by the plurality of electrically insulative protrusions (¶ 0022; Fig. 6).
Regarding claim 8, Spann (Figs. 2, 6) discloses the power electronic assembly of claim 7, wherein an interface between the metal base plate 3 and the first mounting side (bottom) of the power semiconductor module and an interface between the circuit board 67 and the second mounting side (top) of the power semiconductor module are both devoid of gaps in a region where the plurality of electrically insulative protrusions 48/49 is vertically aligned with the plurality of first fixing positions (Fig. 6 - positions of 69/70; the plurality of electrically insulative protrusions is disposed parallel to and at a distance relative to the plurality of first fixing positions, thus are “vertically aligned”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 2, 3, 5, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Spann as applied to claim 1 above, and further in view of US 2022/0301998 A1 to Noderer et al. (hereinafter “Noderer”).
Regarding claim 2, Spann (Figs. 2, 6) discloses the power electronic assembly of claim 1, wherein the power semiconductor module comprises: an electrically insulative frame 2 (Fig. 2) delimiting the first mounting side and the second mounting side of the power semiconductor module, and a border that defines a periphery of the power semiconductor module (¶¶ 0018-19); a first substrate seated in the electrically insulative frame 2 (¶ 0019 - semiconductor device assembly); a plurality of signal pins 9-41 (¶ 0021) protruding through the electrically insulative frame 2 at the second mounting side (top) of the power semiconductor module, and received by the circuit board 67 (Fig. 6).
Spann discloses a semiconductor device assembly, however fails to expressly disclose: a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate, electrically connected to the power semiconductor dies; and a plurality of busbars attached to the first substrate and extending through the border of the power semiconductor module. In the same field of endeavor, Noderer (Fig. 1) discloses a power electronic assembly including: a plurality of power semiconductor dies 6 (¶ 0045) attached to a first substrate 5 (¶ 0046); a plurality of signal pins attached to the first substrate, electrically connected to the power semiconductor dies (unlabelled in Fig. 1, see also Fig. 5); and a plurality of busbars 14/7/9 attached to the first substrate and extending through the border of the power semiconductor module (¶¶ 0042, 46). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the assembly of Spann to include the plurality of power semiconductor dies for the purpose of providing power semiconductor devices in an art-recognized manner, and to include signal pins and busbars as disclosed in Noderer for the purpose of providing electrical connection and functionality to the power semiconductor module and power electronic assembly.
Regarding claim 3, Spann and Noderer disclose the power electronic assembly of claim 2, Spann (Fig. 6) discloses further wherein the electrically insulative frame 2 comprises plastic (¶ 0018), and wherein the plurality of electrically insulative protrusions 48/49 comprises a first plurality of protrusions of the plastic jutting out from the second mounting side (top) of the power semiconductor module (¶ 0022).
Regarding claim 5, Spann and Noderer disclose the power electronic assembly of claim 3, Spann (Fig. 6) discloses further comprising: a plurality of openings in the plastic at the plurality of first fixing positions (Fig. 6, 69/70 disposed therein); and a plurality of fasteners 69/70 (¶ 0031) inserted in the plurality of openings in the plastic and in the plurality of openings in the metal base plate 3, the plurality of fasteners 69/70 attaching the metal base plate 3 to the first mounting side (bottom) of the power semiconductor module at the plurality of first fixing positions (Fig. 6).
Regarding claim 9, Spann and Noderer disclose the power electronic assembly of claim 1, however fail to expressly disclose wherein the power electronic assembly has a height tolerance of 0.05 to 0.1 mm at a side of the power electronic assembly at which the circuit board is attached to the second mounting side of the power semiconductor module. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the recited height tolerance range, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Here, the height tolerance is considered a result effective variable because it affects the structural integrity of the circuit board (see Spann at ¶ 0033) and device functionality. Thus the ordinary artisan would have been motivated to modify the height tolerance range for the purpose of reducing mechanical stress on the circuit board and to reduce the likelihood of device failure.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Spann as applied to claim 1 above, and further in view of US 2020/0212018 A1 to Lai et al. (hereinafter “Lai”).
Regarding claim 10, Spann discloses the power electronic assembly of claim 1, however fails to expressly disclose further comprising: one or more multilayer ceramic capacitors attached to the circuit board. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the assembly of Spann to attach one or more passive devices, such as multilayer ceramic capacitors, to the circuit board for the purpose of providing increased integration density of devices in an assembly in an art-recognized manner (¶ 0010) and to provide additional functionality of the power electronic assembly with the inclusion of different device components.
Allowable Subject Matter
Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Candice Y. Chan whose telephone number is (571)272-9013. The examiner can normally be reached 8:30 am - 5 pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B. Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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CANDICE Y. CHAN
Examiner
Art Unit 2813
4 March 2026
/STEVEN B GAUTHIER/ Supervisory Patent Examiner, Art Unit 2813