DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-10 and 21-25, in the reply filed on 7/2/26 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 7-10 and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsueh et al. (US 2023/0068485).
Regarding claim 1, Hsueh discloses an integrated device comprising:
a die substrate (110, fig. 6 and paragraphs 0021, 0057);
a die interconnection coupled to the die substrate (120, top layer connecting to substrate 110, fig. 6 and paragraphs 0021, 0057);
an encapsulation layer coupled to a side surface of the die substrate and a side surface of the die interconnection (UF1, fig. 6 and paragraphs 0056-0057);
a plurality of pad interconnects coupled to the die interconnection (140, fig. 6 and paragraphs 0021, 0029); and
a plurality of metallization interconnects, wherein one or more metallization
interconnects from the plurality of metallization interconnects is coupled to one or more pad interconnects from the plurality of pad interconnects (124, fig. 6 and paragraphs 0025-0033).
Regarding claim 7, Hsueh further discloses wherein the die interconnection (120, top layer connecting to substrate 110, fig. 6 and paragraphs 0021, 0057) is located between the die substrate (110, fig. 6) and the plurality of
metallization interconnects (124, fig. 6), and
wherein the encapsulation layer laterally surrounds at least part of the plurality of
metallization interconnects (UF1, fig. 6).
Regarding claim 8, Hsueh further discloses a passivation layer (130, figs. 1, 6 and paragraph 0021) coupled to the die interconnection, wherein the encapsulation layer is coupled to the passivation layer (UF1, fig. 6).
Regarding claim 9, Hsueh further discloses a solder resist layer coupled to the encapsulation layer, wherein the encapsulation layer is located between the passivation layer and the solder resist layer (fig. 6 and paragraph 0034).
Regarding claim 10, Hsueh further discloses wherein the integrated device is part of a device selected from a group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an internet of things (IoT) device, and a device in an automotive vehicle (paragraph 0001).
Regarding claim 21, Hsueh discloses a device comprising:
a die substrate (110, fig. 6 and paragraphs 0021, 0057);
a die interconnection coupled to the die substrate (120, top layer connecting to substrate 110, fig. 6 and paragraphs 0021, 0057);
an encapsulation layer coupled to a side surface of the die substrate and a side surface of the die interconnection (UF1, fig. 6 and paragraphs 0056-0057);
a plurality of pad interconnects coupled to the die interconnection (140, fig. 6 and paragraphs 0021, 0029); and
a plurality of metallization interconnects, wherein one or more metallization
interconnects from the plurality of metallization interconnects is coupled to one or more pad interconnects from the plurality of pad interconnects (124, fig. 6 and paragraphs 0025-0033).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-6 and 22-25 are rejected under 35 U.S.C. 103 as being unpatentable over Hsueh et al. (US 2023/0068485) in view of Topacio et al. (US 2017/0110428).
Regarding claims 2 and 22, Hsueh discloses the devices of claims 1 and 21, as mentioned above. Hsueh does not disclose wherein at least some metallization
interconnects from the plurality of metallization interconnects are arranged in a hub and spoke configuration. Topacio discloses a metallization interconnect structure to a semiconductor die that has a hub and spoke configuration (figs. 3-5, Abstract and paragraphs 0009-0010, 0041-0043). It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate Topacio’s hub and spoke metallization interconnects into Hsueh device since Topacio explicitly discloses that the advantages over a conventional structure are that it greatly reduces the overlap capacitance while still maintaining substantial adhesion (paragraphs 0041-0043).
Regarding claims 3 and 23, Topacio further discloses wherein the plurality of metallization interconnects comprise:
a first pad metallization interconnect configured as a hub of the hub and spoke
configuration (100, figs. 3-4 and paragraph 0041);
a first trace metallization interconnect coupled to the first pad metallization interconnect (105, figs. 3-4 and paragraph 0041);
a second trace metallization interconnect coupled to the first pad metallization
interconnect (110, figs. 3-4 and paragraph 0041). Topacio does not disclose a second and a third pad metallization interconnect coupled to the first and the second trace metallization interconnect. However, such variation would be deemed obvious to one of ordinary skill in the art at the time of filing given normal experimentation of Topacio’s teachings since such maintains the hub spoke relationship.
Regarding claims 4 and 24, Topacio further discloses wherein the first trace metallization interconnect (105, figs. 3-4) and the second trace metallization interconnect (110, figs. 3-4) each has a respective thickness that is less than a thickness of the first pad metallization interconnect (100, figs. 3-4).
Regarding claims 5 and 25, it would be deemed obvious to one of ordinary skill in the art at the time of filing to have the width of the first pad (hub) greater than the width of the second pad (spoke), since doing so maintains the hub spoke relationship.
Regarding claim 6, Topacio further discloses wherein the plurality of metallization
interconnects comprise:
a first pad metallization interconnect configured as a hub of the hub and spoke
configuration (100, figs. 3-4 and paragraph 0041);
a first metallization interconnect coupled to the first pad metallization interconnect (105, figs. 3-4 and paragraph 0041). Topacio does not disclose a second pad metallization interconnect coupled to the first metallization interconnect and a third pad metallization interconnect coupled to the first metallization interconnect. However, such variation would be deemed obvious to one of ordinary skill in the art at the time of filing given normal experimentation of Topacio’s teachings since such maintains the hub spoke relationship.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent Application Publication 2011/0074047 discloses a device with relevant metallization interconnections.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS M MENZ whose telephone number is (571)272-1877. The examiner can normally be reached Monday-Friday 8:00am-5:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DOUGLAS M MENZ/Primary Examiner, Art Unit 2897 9/18/26
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