CTNF 18/612,475 CTNF 91738 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement 06-52 The information disclosure statement (IDS) submitted on 6/17/2024, 11/21/2024, 2/12/2025, 5/30/2025 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-3, 6, 17 and 19-20 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Poschl (NPL, “Nonlocal transport signatures of Andreev bound sates”, PhD Thesis, University of Copenhagen, March 2022) . Regarding claim 1, Poschl discloses, in at least figures 5.1, 8.2, and related text, a semiconductor-superconductor hybrid structure comprising: a substrate (InP, section 5.1); a buffer region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As)/ In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) including a superlattice sub-region (5x In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As, figure 5.1) over the substrate (InP, section 5.1) and a graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) over the superlattice sub-region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As), figure 5.1); an active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) over the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) and configured to quantum confine electrons, wherein: the superlattice sub-region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As), figure 5.1) is configured to prevent impurity diffusion and crystalline defects propagating from the substrate (InP, section 5.1) to the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1); the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) is configured to provide a lattice constant transition between the substrate (InP, section 5.1) and the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1); and the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) covers an entire top surface of the buffer region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As)/ In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1); and a superconductor (Al strip of width 100 nm, section 8.2, figures) over the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) and consisting of one or more patterned nanowires (figures). Regarding claim 2, Poschl discloses the semiconductor-superconductor hybrid structure of claim 1 as described above. Poschl further discloses, in at least figures 5.1, 8.2, and related text, the superlattice sub-region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As), figure 5.1) includes a plurality of repeats of a combination of a first superlattice layer and a second superlattice layer, wherein the first superlattice layer and the second superlattice layer are formed of different materials; and the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) includes a plurality of discrete step layers, each of which is formed of a different material with a different lattice constant. Regarding claim 3, Poschl discloses the semiconductor-superconductor hybrid structure of claim 2 as described above. Poschl further discloses, in at least figures 5.1, 8.2, and related text, the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) includes a back barrier layer (In 0.75 Ga 0.25 As, figure 5.1) over the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1), a quantum well layer (InAs, figure 5.1) over the back barrier layer (In 0.75 Ga 0.25 As, figure 5.1), and a top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) over the quantum well layer (InAs, figure 5.1); the superconductor (Al strip of width 100 nm, section 8.2, figures) is over the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1); and bandgaps of the back barrier layer (In 0.75 Ga 0.25 As, figure 5.1) and the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) are higher than a bandgap of the quantum well layer (InAs, figure 5.1), such that the bottom barrier (In 0.75 Ga 0.25 As, figure 5.1) and the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) are configured to confine electrons within the quantum well layer (InAs, figure 5.1). Regarding claim 6, Poschl discloses the semiconductor-superconductor hybrid structure of claim 3 as described above. Poschl further discloses, in at least figures 5.1, 8.2, and related text, the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) is configured to provide a partial lattice transition between a lattice constant of the substrate (InP, section 5.1) and a lattice constant of the back barrier layer (In 0.75 Ga 0.25 As, figure 5.1) within the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) from a bottom surface of the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) over the substrate (InP, section 5.1) and a top surface of the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) on which the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) is provided. Regarding claim 17, Poschl discloses the semiconductor-superconductor hybrid structure of claim 1 as described above. Poschl further discloses, in at least figures 5.1, 8.2, and related text, a cap layer (HfOx, figure 8.2) encapsulating the superconductor (Al strip of width 100 nm, section 8.2, figures) and portions of a top surface of the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) that are not covered by the superconductor (Al strip of width 100 nm, section 8.2, figures). Regarding claim 19, Poschl discloses, in at least figures 5.1, 8.2, and related text, a method for manufacturing a semiconductor-superconductor hybrid structure comprising: providing a substrate (InP, section 5.1); forming a buffer region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As)/ In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) over the substrate (InP, section 5.1), wherein the buffer region includes a superlattice sub-region (5x In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As, figure 5.1) over the substrate (InP, section 5.1) and a graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) over the superlattice sub-region (5x In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As, figure 5.1); forming an active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) over the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1), wherein: the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) is configured to quantum confine electrons; the superlattice sub-region (5x In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As, figure 5.1) is configured to prevent impurity diffusion and crystalline defects propagating from the substrate (InP, section 5.1) to the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1); the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) is configured to provide a lattice constant transition between the substrate (InP, section 5.1) and the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1); and the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) covers an entire top surface of the buffer region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As)/ In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1); forming a superconductor (Al strip of width 100 nm, section 8.2, figures) over the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1), wherein the superconductor (Al strip of width 100 nm, section 8.2, figures) consists of one or more patterned nanowires; and forming a cap layer (HfOx, figure 8.2) to encapsulate the superconductor (Al strip of width 100 nm, section 8.2, figures) and portions of a top surface of the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) that are not covered by the superconductor (Al strip of width 100 nm, section 8.2, figures). Regarding claim 20, Poschl discloses the method of claim 19 as described above. Poschl further discloses, in at least figures 5.1, 8.2, and related text, the superlattice sub-region (5x (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As), figure 5.1) includes a plurality of repeats of a combination of a first superlattice layer and a second superlattice layer, wherein the first superlattice layer and the second superlattice layer are formed of different materials; the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1) includes a plurality of discrete step layers, each of which is formed of a different material with a different lattice constant; the active region (In 0.75 Ga 0.25 As /InAs/In 0.75 Ga 0.25 As, figure 5.1) includes a back barrier layer (In 0.75 Ga 0.25 As, figure 5.1) over the graded lattice sub-region (In 0.52 Al 0.48 As … In 0.89 Al 0.11 As, figure 5.1), a quantum well layer (InAs, figure 5.1) over the back barrier layer (In 0.75 Ga 0.25 As, figure 5.1), and a top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) over the quantum well layer (InAs, figure 5.1); the superconductor (Al strip of width 100 nm, section 8.2, figures) is over the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1); and bandgaps of the back barrier layer (In 0.75 Ga 0.25 As, figure 5.1) and the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) are higher than a bandgap of the quantum well layer (InAs, figure 5.1), such that the bottom barrier (In 0.75 Ga 0.25 As, figure 5.1) and the top barrier layer (In 0.75 Ga 0.25 As, figure 5.1) are configured to confine electrons within the quantum well layer (InAs, figure 5.1) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 5 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Poschl (NPL, “Nonlocal transport signatures of Andreev bound sates”, PhD Thesis, University of Copenhagen, March 2022) in view of Strickland (NPL, “Controlling Fermi level pinning in near-surface InAs quantum wells”, Applied Physics Letters, 121, 092104, 1 September 2022) . Regarding claim 5, Poschl discloses the semiconductor-superconductor hybrid structure of claim 3 as described above. Poschl does not explicitly disclose the graded lattice sub-region is configured to provide a complete lattice transition between a lattice constant of the substrate and a lattice constant of the back barrier layer within the active region from a bottom surface of the graded lattice sub-region over the substrate and a top surface of the graded lattice sub-region on which the active region is provided. Strickland teaches, in at least figure 1 and related text, the device comprising the graded lattice sub-region (In x Al 1-x As graded buffer layer from x=0.52 to 0.81, page 092104-2, figure) is configured to provide a complete lattice transition between a lattice constant of the substrate (InP, page 092104-2, figure) and a lattice constant of the back barrier layer within the active region (In 0.81 Al 0.19 As/In 0.81 Ga 0.19 As/InAs/In 0.81 Ga 0.19 As/In 0.81 Al 0.19 As, page 092104-2, figure) from a bottom surface of the graded lattice sub-region (In x Al 1-x As graded buffer layer from x=0.52 to 0.81, page 092104-2, figure) over the substrate (InP, page 092104-2, figure) and a top surface of the graded lattice sub-region (In x Al 1-x As graded buffer layer from x=0.52 to 0.81, page 092104-2, figure) on which the active region (In 0.81 Al 0.19 As/In 0.81 Ga 0.19 As/InAs/In 0.81 Ga 0.19 As/In 0.81 Al 0.19 As, page 092104-2, figure) is provided, for the purpose of providing hybrid superconductor- semiconductor heterostructure for quantum devices based on mesoscopic and topological superconductivity (abstract). Poschl and Strickland are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Poschl with the specified features of Strickland because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Poschl to have the graded lattice sub-region being configured to provide a complete lattice transition between a lattice constant of the substrate and a lattice constant of the back barrier layer within the active region from a bottom surface of the graded lattice sub-region over the substrate and a top surface of the graded lattice sub-region on which the active region is provided, as taught by Strickland, for the purpose of providing hybrid superconductor-semiconductor heterostructure for quantum devices based on mesoscopic and topological superconductivity (abstract, Strickland). Regarding claim 15, Poschl discloses the semiconductor-superconductor hybrid structure of claim 2 as described above. Poschl does not explicitly disclose a lattice-match layer that is coupled between the substrate and the superlattice sub-region, and has substantially a same lattice constant as the substrate. Strickland teaches, in at least figure 1 and related text, the device comprising a lattice-match layer (100nm In 0.52 Al 0.48 As, page 092104-2) that is coupled between the substrate (InP, page 092104-2) and the superlattice sub-region (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As of 10 periods, page 092104-2), and has substantially a same lattice constant as the substrate (InP, page 092104-2), for the purpose of providing hybrid superconductor-semiconductor heterostructure for quantum devices based on mesoscopic and topological superconductivity (abstract). Poschl and Strickland are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Poschl with the specified features of Strickland because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Poschl to have the lattice-match layer that is coupled between the substrate and the superlattice sub-region, and has substantially a same lattice constant as the substrate, as taught by Strickland, for the purpose of providing hybrid superconductor-semiconductor heterostructure for quantum devices based on mesoscopic and topological superconductivity (abstract, Strickland). Regarding claim 16, Poschl discloses the semiconductor-superconductor hybrid structure of claim 15 as described above. Poschl does not explicitly disclose the lattice-match layer is formed of a same material as a first step layer of the plurality of discrete step layers within the graded lattice sub-region, wherein the first step layer is adjacent to the superlattice sub-region; the lattice-match layer has a thickness between 50 nm and 250 nm. Strickland teaches, in at least figure 1 and related text, the device comprising the lattice-match layer (100nm In 0.52 Al 0.48 As, page 092104-2) is formed of a same material as a first step layer of the plurality of discrete step layers within the graded lattice sub-region (In x Al 1-x As graded buffer layer from x=0.52 to 0.81, page 092104-2, figure), wherein the first step layer is adjacent to the superlattice sub-region (In 0.53 Ga 0.47 As/In 0.52 Al 0.48 As of 10 periods, page 092104-2); and the lattice-match layer (100nm In 0.52 Al 0.48 As, page 092104-2) has a thickness between 50 nm and 250 nm, for the purpose of reducing dislocations. Poschl and Strickland are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Poschl with the specified features of Strickland because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Poschl to have the lattice-match layer being formed of a same material as a first step layer of the plurality of discrete step layers within the graded lattice sub-region, wherein the first step layer is adjacent to the superlattice sub-region; the lattice-match layer has a thickness between 50 nm and 250 nm, as taught by Strickland, for the purpose of reducing dislocations . 07-21-aia AIA Claim (s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Poschl (NPL, “Nonlocal transport signatures of Andreev bound sates”, PhD Thesis, University of Copenhagen, March 2022) in view of Gardner (US 2021/0280763) . Regarding claim 18, Poschl discloses the semiconductor-superconductor hybrid structure of claim 17 as described above. Poschl does not explicitly disclose the cap layer is formed of aluminum oxide (Al2O3) and has a thickness between 2 nm and 10 nm. Gardner teaches, in at least figure 2 and related text, the device comprising the cap layer (16, [20], [21]) is formed of aluminum oxide (Al2O3) and has a thickness between 2 nm and 10 nm, for the purpose of increasing the performance of the semiconductor-superconductor hybrid structure ([4]). Poschl and Gardner are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Poschl with the specified features of Gardner because they are from the same field of endeavor. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Poschl to have the cap layer being formed of aluminum oxide (Al2O3) and has a thickness between 2 nm and 10 nm, as taught by Gardner, for the purpose of increasing the performance of the semiconductor-superconductor hybrid structure ([4], Gardner) . Allowable Subject Matter Claim 4 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 2, 3, and 4 that recite "the graded lattice sub-region is configured to provide an exponentially graded lattice constant between a lattice constant of the substrate and a lattice constant of the back barrier layer within the active region from a bottom surface of the graded lattice sub-region over the substrate and a top surface of the graded lattice sub-region on which the active region is provided" in combination with other elements of the base claims 1, 2, 3, and 4. Claims 7-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 2, 3, and 7 that recite "the graded lattice sub-region is formed of In (1-y) Al y As, wherein y decreases from 48% to 15.5% over a thickness of the graded lattice sub-region; the back barrier layer is formed of In 0.845 Al 0.155 As; the top barrier layer is formed of In (1-x) Al x As, wherein x is a fixed value between 6% and 15%" in combination with other elements of the base claims 1, 2, 3, and 7. Claim 21 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 19, 20, and 21 that recite "the graded lattice sub-region is formed of In (1-y) Al y As, wherein y decreases from 48% to 15.5% over a thickness of the graded lattice sub-region; the back barrier layer is formed of In 0.845 Al 0.155 As; the top barrier layer is formed of In (1-x) Al x As, wherein x is a fixed value between 6% and 15%" in combination with other elements of the base claims 19, 20, and 21. Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONG-HO KIM whose telephone number is (571)270-0276. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TONG-HO KIM/ Primary Examiner, Art Unit 2811 Application/Control Number: 18/612,475 Page 2 Art Unit: 2811 Application/Control Number: 18/612,475 Page 3 Art Unit: 2811 Application/Control Number: 18/612,475 Page 4 Art Unit: 2811 Application/Control Number: 18/612,475 Page 5 Art Unit: 2811 Application/Control Number: 18/612,475 Page 6 Art Unit: 2811 Application/Control Number: 18/612,475 Page 7 Art Unit: 2811 Application/Control Number: 18/612,475 Page 8 Art Unit: 2811 Application/Control Number: 18/612,475 Page 9 Art Unit: 2811 Application/Control Number: 18/612,475 Page 10 Art Unit: 2811 Application/Control Number: 18/612,475 Page 11 Art Unit: 2811 Application/Control Number: 18/612,475 Page 12 Art Unit: 2811 Application/Control Number: 18/612,475 Page 13 Art Unit: 2811
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