DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
2. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
However, should applicant desire to perfect the priority claim, a certified English translation of the foreign application must be submitted in reply to this action. 37 CFR 41.154(b) and 41.202(e).
Failure to provide a certified translation may result in no benefit being accorded for the non-English application.
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on March 21, 2024; May 23, 2024; September 25, 2024; June 18, 2025; and June 3, 2026 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner except as otherwise indicated.
Specification
4. The disclosure is objected to because of the following informalities: grammar.
The phrase "second work insulating layer 213" in paragraph [0146] should read "first work insulating layer 213".
Appropriate correction is required.
Claim Rejections - 35 USC § 103
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
6. Claims 1-13 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Coppens et al (US 2022/0052163, hereafter Coppens) in view of Sriram et al (US 2014/0361343 A1, hereafter Sriram).
Regarding claim 1, Coppens discloses a HEMT device (Fig. 16) comprising:
a body (Fig. 16 1202+1204+1206; [0074]) having a top surface (top of 1206) and including a heterostructure (Fig. 16 1204+1206) configured to generate a 2-dimensional charge-carrier gas ([0037]);
and a gate structure (1402+1602+1506+1510+1512+1514) extending on the top surface of the body (1202+1204+1206) and biasable to electrically control the 2-dimensional charge-carrier gas ([0042]), the gate structure including:
a channel modulating region (Fig. 16 1402; [0076]) of semiconductor material ([0041]) and having a top surface (top of 1402);
a first gate contact region (Fig. 16 1602) of conductive material ([0069]);
a second gate contact region (Fig. 16 1506/1510) of conductive material ([0069], [0076]) being in contact (Fig. 16) with the first gate contact region (1602),
wherein the channel modulating region having a conductivity type ([0041], [0074]; disclosed as p-type);
[AltContent: textbox (For the record, the modified figure (modified Fig. 16 of Coppens) depicts the addition of a functional region (2121/2122) of Sriram in the device of Coppens. The functional region (2121/2122) of semiconductor material has been inserted above the channel modulating region (1402) and below the second gate contacts (1506, 1508). The channel modulating region (1402) has a central portion (1402C) and peripheral regions (1402P) with lateral sidewalls (1402S).)]
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and an insulating region (Fig. 16 1512/1514) of non-conductive material ([0076]) between (Fig. 16) the first gate contact region (1602) and the second gate contact region (1506/1510).
Coppens does not disclose a functional region of semiconductor material; a second gate contact region of conductive material extending, at least in part, on the functional region; wherein the functional region extends on the top surface of the channel modulating region and wherein the first gate contact region is arranged laterally with respect to the functional region; and the channel modulating region having a different conductivity type with respect to the functional region.
Sriram discloses a functional region (Fig. 19 212) of semiconductor material ([0120]); and the channel modulating region (Sriram Fig. 19 38; Sriram [0063]; analogous to Coppens 1402) having a different conductivity type (Coppens [0041], [0074]; disclosed as p-type) with respect to the functional region ([0123]; disclosed as n-type). Sriram is analogous to Coppens in the field of HEMTs.
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to insert the functional region of Sriram on top of the channel modulating region and below the second gate contact region of Coppens (modified Fig. 16 2121/2122) to improve linearity and lower capacitance of the HEMT device, as discussed by Sriram ([0121]).
Furthermore, the modified device of Coppens and Sriram discloses a second gate contact region (1506/1510) of conductive material (Coppens [0069], [0075]) extending (modified Fig. 16), at least in part, on the functional region (2121/2122); and wherein the functional region (2121/2122) extends on the top surface of the channel modulating region (1402) and wherein the first gate contact region (1602) is arranged laterally with respect to the functional region (2121/2122).
Regarding claim 2, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the channel modulating region (1402) has a peripheral portion (1402P) forming a lateral sidewall (1402S) of the channel modulating region (1402), the functional region (2121/2122) extending (modified Fig. 16), at least in part, on the peripheral portion (1402P).
Regarding claim 3, Coppens and Sriram disclose the HEMT device according to claim 2, wherein the functional region (2121/2122) has an outer wall (left wall of 2121, right wall of 2122) contiguous (modified Fig. 16) to the lateral sidewall (1402S) of the channel modulating region (1402).
Regarding claim 4, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the functional region (2121/2122) is of intrinsic-type (Sriram [0063]).
Regarding claim 5, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the channel modulating region (1402) has a first conductivity type (Coppens [0041], [0075]; disclosed as p-type) and the functional region (2121/2122) has a second conductivity type (Sriram [0123]; disclosed as n-type) opposite to the first conductivity type.
Regarding claim 6, Coppens and Sriram disclose the HEMT device according to claim 5, wherein the functional region (2121/2122) has a concentration of doping species lower than 1015 atoms/cm3 (Sriram [0124]).
Regarding claim 7, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the functional region (2121/2122) has an inner wall in contact (modified Fig. 16 right side of 2121, left side of 2122) with the first gate contact region (1602).
Regarding claim 8, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the functional region (2121/2122) has a width (modified Fig. 16 horizontal distance from the left side to the right side of 2121 or 2122) along a first direction (horizontal direction), and the first gate contact region (1602) has a width (horizontal distance across 1602), along the first direction (horizontal direction), which is greater (modified Fig. 16, first gate contact region positioned between functional region) than the width of the functional region (horizontal distance from the left side to the right side of 2121 or 2122).
Regarding claim 9, Coppens and Sriram disclose the HEMT device according to claim 8, wherein the second gate contact region (1506/1510) has a width (Fig. 16 horizontal distance from the left side to the right side of 1506 or 1510) along the first direction (horizontal direction).
Coppens and Sriram do not explicitly disclose a second gate contact region width along the first direction smaller than along the first direction of the functional region.
However, Coppens discloses in a different embodiment that the second gate contact region (1506/1510) may be recessed (Coppens Fig. 4; [0054]; second gate contact region 1506/1510 is analogous to Fig. 4 410/412) from the edge of the channel modulating region (1402; channel modulating region 1402 analogous to Fig. 4 112). Additionally, Coppens and Sriram disclose the functional region (2121/2122) and the channel modulating region (1402) have contiguous sidewalls with each other (modified Fig. 16), and the functional region (2121/2122) and the second gate contact region have contiguous walls with each other on the side facing the first gate contact (1602) (modified Fig. 16).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to reduce the width of the second gate contact region to be smaller than the width of the functional region to maintain an acceptable breakdown voltage while still obtaining a low turn-on voltage, as discussed by Coppens ([0057]).
Regarding claim 10¸ Coppens and Sriram disclose the HEMT device according to claim 9, wherein the second gate contact region is of TiN (Coppens Figs. 13, 14; [0069], [0075] – [0076]).
Regarding claim 11, Coppens and Sriram disclose the HEMT device according to claim 1, wherein the insulating region (1512/1514) extends (modified Fig. 16) on a lateral sidewall (1402S) of the channel modulating region (1402) and on an outer wall of the functional region (left side of 2121, right side of 2122) and extending, at least in part, on and at a distance (modified Fig. 16) with respect to the top surface of the channel modulating region (top of 1402).
Regarding claim 12, Coppens discloses a process for manufacturing a HEMT device, comprising:
forming, on a top surface of a work body (Fig. 16 top surface of 1202) including a heterostructure (Fig. 16 1204+1206), a gate structure (Fig. 16, 1402+1602+1506+1510+1512+1514; [0073] – [0077]) wherein the heterostructure (1204+1206) is configured to generate a 2-dimensional charge-carrier gas ([0037]), and the gate structure is biasable to electrically control the 2-dimensional charge-carrier gas ([0042]),
wherein forming a gate structure (1402+1602+1506+1510+1512+1514; [0073] – [0077]) comprises:
forming a channel modulating region (1402) having a top surface (top of 1402), starting from a first semiconductor layer (Fig. 12 1208; [0074]);
forming a first gate contact region (Fig. 16 1602) of conductive material ([0069]) extending (Fig. 16) on the top surface of the channel modulating region (1402), wherein the channel modulating region has a conductivity type ([0041], [0074]; disclosed as p-type),
forming a second gate contact region (Fig. 16 1506/1510) in contact (Fig. 16) with the first gate contact region (1602);
and forming at least one insulating layer (1512/1514) of non-conductive material ([0076]) on the second gate contact region (1506/1510), the at least one insulating layer (1512/1514) of non-conductive material being partially under (Fig. 16) the first gate region (1602).
Coppens does not disclose forming a functional region on the top surface of the channel modulating region, starting from a second semiconductor layer; forming a first gate contact region laterally with respect to the functional region; the channel modulating region has a different conductivity type with respect to the functional region; and forming a second gate contact region extending, at least in part, on the functional region.
Sriram discloses forming a functional region (Fig. 19 212; [0122]) of semiconductor material ([0120]); and the channel modulating region having a different conductivity type (Coppens [0041], [0074]; disclosed as p-type) with respect to the functional region ([0123]; disclosed as n-type).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to form the functional region of Sriram on top of the channel modulating region and before forming the second gate contact region of Coppens (modified Fig. 16 2121/2122) to improve linearity and lower capacitance of the HEMT device, as discussed by Sriram ([0121]).
Furthermore, the modified device of Coppens and Sriram discloses forming a first gate contact region (1602) laterally (modified Fig. 16) with respect to the functional region (2121/2122), and forming a second gate contact region (1506/1510) extending (modified Fig. 16), at least in part, on the functional region (2121/2122).
Regarding claim 13¸Coppens and Sriram disclose the manufacturing process according to claim 12, further comprising:
forming the first semiconductor layer (modified Fig. 16 1402; Coppens [0074]) on the top surface of the work body (top surface of 1202);
forming the second semiconductor layer (modified Fig. 16 2121/2122) on the first semiconductor layer (1402);
patterning the first (Coppens [0076]) and the second (Sriram [0127]) semiconductor layers (1402, 2121/2122);
wherein forming at least one insulating layer (1512/1514) of non-conductive material (Coppens [0076]) further includes depositing the at least one insulating layer (1512/1514) on a lateral sidewall of the patterned first semiconductor layer (modified Fig. 16 left/right edges of 1402), on an outer wall of the patterned second semiconductor layer (modified Fig. 16 left edge of 2121, right edge of 2122) and, at least in part, over and at a distance (modified Fig. 16) with respect to the top surface of the first semiconductor layer (top of 1402);
wherein forming the first gate contact region (1602; [0077]) comprises:
forming an opening (Fig. 15 1502; [0076]) exposing a portion of the patterned first semiconductor layer (1402), the opening (1502) extending through (modified Fig. 16) the at least one insulating layer (1512/1514) and the second semiconductor layer (2121/2122);
and forming conductive material ([0069], [0077]) within the opening (1502).
Regarding claim 15, Coppens and Sriram disclose the manufacturing process according to claim 12, further comprising forming at least one current conducting region (Fig. 16 1604; [0077]), of conductive material ([0077]), in contact with the heterostructure (1204+1206) (1604 is in contact with 1206 through 1602 and 1402), the step of forming the gate structure (1402+1602+1506+1510+1512+ 1514; [0073] – [0077]) being performed before forming the at least one current conducting region (1604).
Regarding claim 16¸ Coppens discloses a device, comprising:
a heterostructure (Fig. 16 1204+1206) having a surface (top of 1206) and configured to generate a two-dimensional charge-carrier gas ([0037]);
a channel modulating region (Fig. 16 1402; [0076]) of semiconductor material ([0041]) on the surface (top of 1206);
a first gate contact region (Fig. 16 1602);
an opening (Fig. 15 1502 + Fig. 16 area between 1402 and 1512/1514) through the first gate contact region (1602) exposing a top surface of the channel modulating region (1402);
a passivation layer (1512/1514) on the surface of the heterostructure (top surface of 1204+1206), and the first gate contact region (1602), the passivation layer (1512/1514) is not in (Fig. 16) the opening (1502 + area between 1402 and 1512/1514) and not on (Fig. 16) the top surface of the channel modulation region (top of 1402);
and a second gate contact region (Fig. 16 1506/1510) in the opening (1502 + area between 1402 and 1512/1514), in contact (Fig. 16) with the top surface of the channel modulation region (top of 1402), and overlapping (Fig. 16) the passivation layer (1512/1514).
Coppens does not disclose a functional region of semiconductor material on the channel modulating region; a first gate contact region on the functional region; an opening through the functional region, exposing a top surface of the channel modulating region; a passivation layer on the functional region;
Sriram discloses a functional region (Fig. 19 212) of semiconductor material ([0120]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to insert the functional region of Sriram on top of the channel modulating region and below the second gate contact region of Coppens (modified Fig. 16 2121/2122) to improve linearity and lower capacitance of the HEMT device, as discussed by Sriram ([0121]).
Furthermore, the modified device of Coppens and Sriram discloses the functional region (2121/2122) on the channel modulating region (1402); a first gate contact region (1602) on the functional region (2121/2122); an opening (1502 + area between 1402 and 1512/1514) through the functional region (2121/2122), exposing a top surface of the channel modulating region (top of 1602); and a passivation layer (1512/1514) on the functional region (2121/2122).
Regarding claim 17, Coppens and Sriram disclose the device of claim 16, wherein the functional region (2121/2122) includes two separate parts (2121 and 2122), the opening (1502) being between the two separate parts (2121 and 2122).
Regarding claim 18, Coppens and Sriram disclose the device of claim 16, wherein the functional region (2121/2122) is polygonal shape (modified Fig. 16).
Regarding claim 19, Coppens and Sriram disclose the device of claim 16, wherein the first gate region (1602) has a first width (horizontal distance from left edge to right edge of 1602 within opening 1502) and the functional region (2121/2122) has a second width (horizontal distance from left edge of 2121 to the right edge of 2122) larger (modified Fig. 16) than the first width.
Regarding claim 20, Coppens and Sriram disclose the device of claim 19, wherein the passivation layer (15012/1514) is in contact with a sidewall of the functional region (left wall of 2121, right wall of 2122) and a top area of the functional region (top of 2121/2122), the top area being coplanar to a first plane (modified Fig. 16, horizontal plane going through top corners of 2121/2122 where the corners touch 1602) where the functional region (2121/2122) is in contact with the first gate contact region (1602), the sidewall of the functional region (left wall of 2121, right wall of 2122) being on a second plane (modified Fig. 16, vertical plane going through where the left wall of 2121 and the right wall of 2122 touch 1512 and 1514, respectively) to where traverse to the first plane.
7. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Coppens and Sriram as applied to claim 12 above, and further in view of Tanaka et al (US 2010/0120237 A1).
Regarding claim 14, Coppens and Sriram disclose the manufacturing process according to claim 12, wherein forming a second gate contact region (1506/1510) further comprises:
forming at least one contact layer (modified Fig. 16 1506/1510) of conductive material ([0069], [0076]) on the second semiconductor material layer (modified Fig. 16 2121/2122);
and the at least one contact layer (1506/1510) over the second semiconductor layer (2121/2122), where it is intended to form the first gate contact region
Coppens and Sriram do not disclose performing an annealing configured to promote the formation of an ohmic contact between the at least one contact layer and the second semiconductor layer;
and removing a portion of the at least one contact layer over the second semiconductor layer.
Tanaka discloses removing a portion of the at least one contact layer (Fig. 3H 60; [0035]) (of conductive material ([0035])) over the second semiconductor layer (Fig. 3H 21), and performing an annealing ([0035]) to promote the formation of an ohmic contact ([0035]) between the at least one contact layer (60) and the second semiconductor layer (21). Tanaka is analogous to Coppens in the field of semiconductor manufacturing.
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to include the method steps disclosed by Tanaka in the method of Coppens and Sriram to form an ohmic contact and minimize the energy barrier between the two layers, improving conductivity. Furthermore, any order of performing process steps is prima facie obvious in absence of unexpected results (see MPEP 2144.04).
Conclusion
8. The following art made of record and not relied upon is considered pertinent to applicant’s disclosure.
Liu et al (US 2020/0212173 A1) discloses a HEMT device with a gate structure containing a semiconductor functional region
Hurkx et al (US 2017/0154988 A1) discloses a HEMT device with a second gate contact region
Lidow et al (US 2012/0175631 A1) discloses a method for forming a GaN HEMT device
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL B SUN whose telephone number is (571)699-0231. The examiner can normally be reached Mon-Fri 8:00-5:00.
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/MICHAEL B SUN/Examiner, Art Unit 2892
/ERIC W JONES/Primary Examiner, Art Unit 2892
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