DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
1. This Office Action is in response to Amendment filed on date: 1/19/2026.
Claims 1, 3-10 and 12-20 are currently pending.
Claims 2 and 11 are cancelled.
Claims 19-20 are newly added.
Claims 1, 10, and 19-20 are independent claims.
Response to Arguments
2. Applicant's arguments, see in pages 10-11 in the submitted Remarks, filed on 1/19/2026, with respect to newly added claims 19-20 have been fully considered but are moot in view of the new ground(s) of rejection.
Examiner Notes
3. Examiner cites particular paragraphs, columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (CN107525980; hereinafter “Chen”) in view of Bourstein (US. Pub. 2012/0293195; hereinafter “Bourstein”) and further in view of Bhogela et al. (US. Pub. 20150123696; hereinafter “Bhogela”).
Regarding claim 19, Chen discloses, in Figs. 2-3, a test control device (a test apparatus for operating a testing technique for USB Type-C Power Delivery (PD), and more particularly to a testing technique for automating USB Type-C PD testing via a testing device and serial communication; see paragraph [0002]), comprising: a first connector (a first connection interface 110), coupled to a device under test (a device to be tested 200 is an electronic device having USB Type-C interface 110) as a Universal Serial Bus (USB) interface (the C-type universal serial bus interface 110); and a data processor (a test device 100 includes a processor 130 and a controller 120 in Fig. 2B), coupled to the first connector (the first connection interface 110) and a second connector (a second connection interface 150), wherein the data processor (100) receives a test signal (a test command or test instruction S4, see paragraph [0059]) sent by an external electronic device (an external control system 300 in Fig. 2B) through the second connector (150), the data processor (the processor 130 of the test device 100) forwards the test signal to the device under test through the first connector (the external control system 300 can send a test command S4 to the second connection interface150 to inform the test device 100 which set of voltage and current power transmission tests of the device under test 200 is to be performed. When a test instruction S4 is received from the external control system 300, the processor 130 will send a power requirement S5 to the device under test 200 through the first connection interface 110according to the test instruction S4, so as to instruct the device under test 200 to provide the second set of voltage and current values for testing. See [0049]), and the data processor (130) receives a test feedback data from the device under test through the first connector (When the device under test 200 receives the power requirement S5, the DUT 200 received the test instruction from the processor 130 and provided power information from the DUT back to the processor 130 according to the test instruction. See at least in [0060-61] and also see [62-4] and Fig. 3).
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Chen does not explicitly specify that a voltage generator coupled to a device under test and the voltage generator configured to generate a supply voltage to the device under test. Bourstein discloses, in Fig. 1, a test apparatus (100) for testing an electronic device, comprising a voltage generator (a voltage regulator of a tester 102) coupled to a device under test (a DUT 130) and the voltage generator configured to generate a supply voltage to the device under test (a VDD terminal of the DUT 130 is configured to receive a power supply from an external power source such as Vout of the voltage regulator 125, and to provide the received power to circuits within the DUT 130 during operation, see Fig. 1 and at least in [0016]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the test system of Chen by having a voltage generator coupled to a device under test and the voltage generator configured to generate a supply voltage to the device under test, as taught by Bourstein for purpose of providing a useful method of determining whether the DUT meets a specified performance requirement while the voltage regulator regulates the power supply provided to the DUT based on the feedback signal. received from the DUT.
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Chen and Bourstein does not explicitly specify that the data processor directly forwards the test signal to the device under test through the first connector. Bhogela discloses a test system (Figs. 3 and 5) comprising an external test device (234) connected to a processor (102) via a first connection interface (502, 504) and the processor (102) connected to the circuit under tested (104) via a second connection interface (506, 510), wherein the data processor directly forwards the test signal to the device under test through the first connector (the external test device 234 configured to transmit an input test signal to an I/O interface 210 of the processor 102 directly forwarded the input test signal to the circuit under tested 104. See at least in [0046]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the test system of Chen and Bourstein by the data processor directly forwards the test signal to the device under test through the first connector, as taught by Bhogela in order to meet the system design and specification requirement.
Regarding claim 20, Chen discloses an operating method of a test control device (an operation method for operating a testing technique for USB Type-C Power Delivery (PD), and more particularly to a testing technique for automating USB Type-C PD testing via a testing device and serial communication; see paragraph [0002]), comprising: coupling a first connector interface (a first connection interface 110) to a device under test (a device to be tested 200 is an electronic device having USB Type-C interface 110) as a Universal Serial Bus (USB) interface (the C-type universal serial bus interface 110); enabling a data processor (a test device 100 includes a processor 130 and a controller 120 in Fig. 2B) to receive a test signal (a test command or test instruction S4, see paragraph [0059]) sent by an external electronic device (an external control system 300 in Fig. 2B) through a second connector (a second connection interface 150); enabling the data processor (130) to forward the test signal to the device under test through the first connector (the external control system 300 can send a test command S4 to the second connection interface150 to inform the test device 100 which set of voltage and current power transmission tests of the device under test 200 is to be performed. When a test instruction S4 is received from the external control system 300, the processor 130 will send a power requirement S5 to the device under test 200 through the first connection interface 110according to the test instruction S4, so as to instruct the device under test 200 to provide the second set of voltage and current values for testing. See [0049]); and enabling the data processor (130) to receive a test feedback data from the device under test through the first connector (When the device under test 200 receives the power requirement S5, the DUT 200 received the test instruction from the processor 130 and provided power information from the DUT back to the processor 130 according to the test instruction. See at least in [0060-61] and also see [62-4] and Fig. 3).
Chen does not explicitly specify that enabling a voltage generator to be coupled to a device under test and enabling the voltage generator to generate a supply voltage to the device under test. Bourstein discloses, in Fig. 1, a test apparatus (100) for testing an electronic device, comprising a voltage generator (a voltage regulator of a tester 102) coupled to a device under test (a DUT 130) and the voltage generator configured to generate a supply voltage to the device under test (a VDD terminal of the DUT 130 is configured to receive a power supply from an external power source such as Vout of the voltage regulator 125, and to provide the received power to circuits within the DUT 130 during operation, see Fig. 1 and at least in [0016]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the test system of Chen by having a voltage generator coupled to a device under test and the voltage generator configured to generate a supply voltage to the device under test, as taught by Bourstein for purpose of providing a useful method of determining whether the DUT meets a specified performance requirement while the voltage regulator regulates the power supply provided to the DUT based on the feedback signal received from the DUT.
Chen and Bourstein does not explicitly specify that the data processor directly forwards the test signal to the device under test through the first connector. Bhogela discloses a test system (Figs. 3 and 5) comprising an external test device (234) connected to a processor (102) via a first connection interface (502, 504) and the processor (102) connected to the circuit under tested (104) via a second connection interface (506, 510), wherein the data processor directly forwards the test signal to the device under test through the first connector (the external test device 234 configured to transmit an input test signal to an I/O interface 210 of the processor 102 directly forwarded the input test signal to the circuit under tested 104. See at least in [0046]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to employ the test system of Chen and Bourstein by the data processor directly forwards the test signal to the device under test through the first connector, as taught by Bhogela in order to meet the system design and specification requirement.
Allowable Subject Matter
6. Claims 1, 3-10 and 12-18 are allowed over the prior arts of record.
7. The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 1, the cited references, alone or in combination, do not disclose nor fairly suggest:
“ … the data processor forwards the test signal to the device under test through the first connector, and the data processor receives a test feedback data from the device under test through the first connector; and a power delivery (PD) controller coupled to the voltage generator and a configuration channel (CC) pin of the first connector, configured to detect whether the device under test has a charging mode supporting a PD protocol through the CC pin of the first connector, wherein when the PD controller detects that the device under test has the charging mode supporting the PD protocol, the voltage generator selects a candidate voltage from a plurality of candidate voltages as the supply voltage through the PD controller, and provides the supply voltage to the device under test.” in combination with all other elements as claimed in claim 1. Regarding claim 10, the cited references, alone or in combination, do not disclose nor fairly suggest:
“ … enabling the data processor to receive a test feedback data from the device under test through the first connector; providing a power delivery (PD) controller, and enabling the PD controller to detect whether the device under test has a charging mode supporting a PD protocol through a configuration channel (CC) pin of the first connector; and when the PD controller detects that the device under test has the charging mode supporting the PD protocol, enabling the voltage generator to select a candidate voltage from a plurality of candidate voltages as the supply voltage through the PD controller, and enabling the PD controller to provide the supply voltage to the device under test” in combination with all other elements as claimed in claim 10.
As to claim(s) 3-9, the claims are allowable as they further limit allowable subject matter of claim 1.
As to claim(s) 12-18, the claims are allowed as they further limit allowable subject matter of claim 10.
Conclusion
8. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANG LE whose telephone number is (571)272-9349. The examiner can normally be reached on Monday thru Friday 7:30AM-5:00PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached on (571) 272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/THANG X LE/Primary Examiner, Art Unit 2858
4/6/2026