Prosecution Insights
Last updated: October 02, 2026
Application No. 18/614,098

CHANNEL STRUCTURES IN SEMICONDUCTOR DEVICES

Final Rejection §102
Filed
Mar 22, 2024
Examiner
SENGDARA, VONGSAVANH
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
683 granted / 946 resolved
+12.2% vs TC avg
Strong +18% interview lift
Without
With
+18.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
78 currently pending
Career history
1018
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
51.8%
+11.8% vs TC avg
§102
27.3%
-12.7% vs TC avg
§112
17.9%
-22.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 946 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) rejected have been considered but are moot because the new ground of rejection does not rely on Lin et al. 20230067988 applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. 20230067988. PNG media_image1.png 587 835 media_image1.png Greyscale PNG media_image2.png 426 542 media_image2.png Greyscale PNG media_image3.png 452 360 media_image3.png Greyscale Regarding claim 16, figs. 6-7 of Lin discloses a semiconductor device, comprising: a substrate 202; a fin base (ML in fig. 4) disposed on the substrate; a nanostructured channel structure, disposed on the fin base, comprising: a germanium (Ge)-free region 208, a Ge-doped region 222 surrounding the Ge-free region, wherein the Ge-doped region 222 has a graded germanium concentration profile (fig. 7 – 402 and par [0028]) such that an outer portion (sidewall portion 222B) of the Ge-doped region has a first Ge concentration and a second portion of the Ge-doped region (middle portion of 222A) in contact with the Ge-free region has a second Ge concentration less than the first Ge concentration; a capping layer 220 surrounding wrapped around the Ge-doped region; and a gate structure (203b which a gate to block/minimize Ge from leaving 222 - portions of the Ge-doped layer 222 may remain on the sidewalls of the fins 203 (i.e., the base fins 203b) 203b acts a gate to block Ge from leaving) surrounding the nanostructured channel structure. Regarding claim 17, par [0025] of Lin discloses wherein the capping comprises a silicon germanium (SiGe) layer. Regarding claim 18, Lin discloses wherein the Ge-free region 208 comprises a Ge-free silicon region (isolation features 208 include silicon oxide which has Ge-free silicon region as SiO2 has Si). Regarding claim 19, Lin necessary discloses wherein the Ge concentration in the Ge doped Ge-doped region is lower than a Ge concentration in the capping layer (as Ge is diffused from the capping layer). Regarding claim 20, fig. 6 of Lin discloses wherein the Ge doped region capping layer is in contact with the gate structure. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VONGSAVANH SENGDARA whose telephone number is (571)270-5770. The examiner can normally be reached 9AM-6PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, PURVIS A. Sue can be reached on (571 )272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VONGSAVANH SENGDARA/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Mar 22, 2024
Application Filed
Apr 23, 2026
Non-Final Rejection mailed — §102
Jul 23, 2026
Response Filed
Sep 22, 2026
Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751021
FERROMAGNETIC MATERIAL BASED INTEGRATED INDUCTOR IN SILICON
3y 4m to grant Granted Sep 29, 2026
Patent 12716124
VACUUM TUNNELING DEVICE AND METHOD OF MANUFACTURING THE SAME
4y 2m to grant Granted Aug 25, 2026
Patent 12721204
METHOD FOR MANUFACTURING A PACKAGE STRUCTURE
3y 11m to grant Granted Aug 25, 2026
Patent 12721005
DISPLAY PANEL AND FABRICATING METHOD THEREOF, AND DISPLAY DEVICE
3y 5m to grant Granted Aug 25, 2026
Patent 12721021
DISPLAY PANEL AND DISPLAY DEVICE
3y 4m to grant Granted Aug 25, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
91%
With Interview (+18.4%)
3y 3m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 946 resolved cases by this examiner. Grant probability derived from career allowance rate.

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