Prosecution Insights
Last updated: April 19, 2026
Application No. 18/614,134

ORTHOGONAL SYSTEM ARCHITECTURE AND NETWORK DEVICE

Non-Final OA §102§103§112
Filed
Mar 22, 2024
Examiner
TRAN, BINH BACH THANH
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Huawei Technologies Co., Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
92%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
545 granted / 680 resolved
+12.1% vs TC avg
Moderate +12% lift
Without
With
+12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
28 currently pending
Career history
708
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
54.1%
+14.1% vs TC avg
§102
35.3%
-4.7% vs TC avg
§112
8.5%
-31.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 680 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to under 37 CFR 1.83(a) because they fail to show claims 20 & 29, “a window” as described in the specification. Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Regarding claims 20 and 29, it is unclear the meaning of “a window” because there is no a company drawing and/or description for this term. It might be an opening, a cavity or an area. For the purpose of compact prosecution, the Examiner considers it as a space. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 13 - 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chang (US 20090314516). Regarding claim 13, Chang discloses an orthogonal system architecture, comprising: a first circuit board (a first circuit board 101, Fig. 7C); a second circuit board (a second circuit board 102), wherein the first circuit board and the second circuit board are disposed vertically to each other (the two circuit boards may be arranged in a vertical position to each other, Fig. 10); a first connector (connector 120, Fig. 7C), wherein the first connector is electrically connected to the first circuit board via a first cable assembly (cable 301); and a second connector (connector 105), wherein the second connector is disposed on the second circuit board (102) and is electrically connected to the second circuit board, and the first connector (120) is plug- connected to the second connector (105), to electrically connect the first circuit board to the second circuit board. Regarding claim 14, Chang discloses the claimed invention as set forth in claim 13. Chang further discloses the first connector (120) is a straight male connector (male connector 120, Fig. 7C), and the second connector is a curved female connector (connector 105 is a female connector); or the first connector is a curved female connector, and the second connector is a straight male connector. Regarding claim 15, Chang discloses the claimed invention as set forth in claim 13. Chang further discloses the first cable assembly comprises a first cable (cable 301) and a first board-end connector (connector 110), the first board-end connector is disposed on the first circuit board (101) and is electrically connected to the first circuit board, a first end of the first cable is electrically connected to the first board-end connector (110), and a second end of the first cable is electrically connected to the first connector (120). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 16 – 20, 25 - 29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chang (US 20090314516), in view of Chang2 (US 20160004662). Regarding claim 16, Chang discloses the claimed invention as set forth in claim 13. Chang does not explicitly disclose the second connector is electrically connected to the second circuit board via a second cable assembly. Chang2 teach a hub connector (20, Fig. 5) comprising connectors (22, 23) connected to two circuit boards (30, 40) through two cables (81, 82). It would have been obvious to one having skill in the art at the effective filing date of the invention to use hub connector, as suggested by Chang2, in order to increase connection of the components as needed. Regarding claim 17, Chang discloses the claimed invention as set forth in claim 16. Chang further suggests the first connector is a straight male connector (male connector 120), and the second connector is a curved female connector (female connector 105) or a straight female connector; or the first connector is a curved female connector or a straight female connector, and the second connector is a straight male connector. Regarding claim 18, Chang, in view of Chang2, discloses the claimed invention as set forth in claim 16. Chang2 further suggests the second cable assembly comprises a second cable (82) and a second board-end connector (41), the second board- end connector is disposed on the second circuit board (40) and is electrically connected to the second circuit board (40), a first end of the second cable is electrically connected to the second board-end connector (41), and a second end of the second cable is electrically connected to the second connector (hub connector 20). Regarding claim 19, Chang discloses the claimed invention as set forth in claim 13. Chang does not explicitly disclose an installation board disposed between the first circuit board and the second circuit board, wherein the first connector is disposed on the installation board. Chang2 teaches an installation board (hub circuit board 20) disposed between the first circuit board (30) and the second circuit board (40), wherein the first connector is disposed on the installation board (connector 22). It would have been obvious to one having skill in the art at the effective filing date of the invention to include the hub circuit board in order to increase the connection points as needed when the increasing complexity of the electronic device is desired. Regarding claim 20, Chang discloses the claimed invention as set forth in claim 19. Chang further suggests a window (a space on the board to install the connector) is disposed on the installation board, and the first connector is disposed in the window. Regarding claim 25, Chang discloses the claimed invention as set forth in claim 22. Chang does not explicitly disclose the second connector is electrically connected to the second circuit board via a second cable assembly. Chang2 teach a hub connector (20, Fig. 5) comprising connectors (22, 23) connected to two circuit boards (30, 40) through two cables (81, 82). It would have been obvious to one having skill in the art at the effective filing date of the invention to use hub connector, as suggested by Chang2, in order to increase connection of the components as needed. Regarding claim 26, Chang discloses the claimed invention as set forth in claim 25. Chang further suggests the first connector (120) is a straight male connector (straight male connector 120), and the second connector is a curved female connector (female connector 105) or a straight female connector; or the first connector is a curved female connector or a straight female connector, and the second connector is a straight male connector. Regarding claim 27, Chang, in view of Chang2, discloses the claimed invention as set forth in claim 25. Chang2 further suggests the second cable assembly comprises a second cable (82) and a second board-end connector (41), the second board- end connector is disposed on the second circuit board (40) and is electrically connected to the second circuit board (40), a first end of the second cable is electrically connected to the second board-end connector (41), and a second end of the second cable is electrically connected to the second connector (hub connector 20). Regarding claim 28, Chang discloses the claimed invention as set forth in claim 22. Chang does not explicitly disclose an installation board disposed between the first circuit board and the second circuit board, wherein the first connector is disposed on the installation board. Chang2 teaches an installation board (hub circuit board 20) disposed between the first circuit board (30) and the second circuit board (40), wherein the first connector is disposed on the installation board (connector 22). It would have been obvious to one having skill in the art at the effective filing date of the invention to include the hub circuit board in order to increase the connection points as needed when the increasing complexity of the electronic device is desired. Regarding claim 29, Chang discloses the claimed invention as set forth in claim 28. Chang further suggests a window (a space on the board to install the connector) is disposed on the installation board, and the first connector is disposed in the window. Claim(s) 31 - 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chang2 (US 20160004662), in view of Chang (US 20090314516). Regarding claim 31, Chang2 discloses a method for manufacturing an orthogonal system architecture, the method comprising: electrically connecting a first end of a first cable assembly (cable 81, Fig. 5) to a first circuit board (circuit board 30); disposing an installation board (the hub circuit board 20) in a manner that the first circuit board is located on a first side of the installation board, disposing a first connector (connector 22) on the installation board, and electrically connecting the first connector to a second end of the first cable assembly (81); disposing a second circuit board (circuit board 40) in a manner that the second circuit board is located on another side of the installation board (20), disposing a second connector (combination of connectors 41, cable 82, and 23) on the second circuit board, and electrically connecting the second connector to the second circuit board. Chang2 does not explicitly disclose disposing the second circuit board vertically to the first circuit board, and plug- connecting the second connector to the first connector, to electrically connect the second circuit board to the first circuit board. Chang teaches disposing the second circuit board vertically to the first circuit board (Fig. 10), and plug- connecting the second connector (connector 105, Fig. 7C) to the first connector (connector 120), to electrically connect the second circuit board (circuit board 102) to the first circuit board (circuit board 101). It would have been obvious to one having skill in the art at the effective filing date of the invention to plug connectors together in order to interconnecting the circuit boards into a system. Regarding claim 32, Chang2, in view of Chang, discloses the claimed invention as set forth in claim 31. Chang2 further suggests the second connector (23, 41, and 82) is electrically connected to the second circuit board via a second cable assembly (cable 82). Claim(s) 22 - 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chang (US 20090314516). Regarding claim 22, Chang discloses a network device, comprising: an interface processing unit (a processor of the computer in Fig. 10); and an orthogonal system architecture (Fig. 10), comprising: a first circuit board (circuit board 101, Fig. 7C); a second circuit board (circuit board 102), wherein the first circuit board and the second circuit board are disposed vertically to each other (Fig. 10); a first connector (connector 120), wherein the first connector is electrically connected to the first circuit board via a first cable assembly (301); and a second connector (connector 105), wherein the second connector is disposed on the second circuit board (102) and is electrically connected to the second circuit board, and the first connector (120) is plug-connected to the second connector (105), to electrically connect the first circuit board to the second circuit board. Chang does not explicitly disclose wherein the interface processing unit is disposed on the first circuit board or the second circuit board. Chang suggests the components are responsible for processing signal. Chang further suggests one of the circuit board is on the keyboard side of the laptop component, Fig. 10, which is a main circuit board of the computer and possible containing the processor. It would have been obvious to one having skill in the art at the effective filing date of the invention to place process on the circuit board in order for the processor to function properly to control other components in the system. Regarding claim 23, Chang discloses the claimed invention as set forth in claim 22. Chang further suggests the first connector is a straight male connector (male connector 120), and the second connector is a curved female connector (female connector 105); or the first connector is a curved female connector, and the second connector is a straight male connector. Regarding claim 24, Chang discloses the claimed invention as set forth in claim 22. Chang further discloses the first cable assembly comprises a first cable (cable 301) and a first board-end connector (connector 110), the first board-end connector is disposed on the first circuit board (101) and is electrically connected to the first circuit board (101), a first end of the first cable is electrically connected to the first board-end connector (110), and a second end of the first cable is electrically connected to the first connector (120). Allowable Subject Matter Claim 21, 30 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Reasons for Allowance The following is an examiner’s statement of reasons for allowance: Regarding claim 21, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claim 13 and 19, a combination of limitations that a housing; and wherein the first circuit board is disposed in the housing, and the installation board is disposed outside the housing and faces a side wall of the housing. None of the reference art of record discloses or renders obvious such a combination. Regarding claim 30, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claims 22 and 28, a combination of limitations that a housing; and wherein the first circuit board is disposed in the housing, and the installation board is disposed outside the housing and faces a side wall of the housing. None of the reference art of record discloses or renders obvious such a combination. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Fan (US 20230122445) discloses two circuit boards connected to each other in a vertical system, Fig. 1. Lynn (US 20230122445) discloses two circuit board connected to each other via a backplane board, Fig. 1. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BINH B TRAN whose telephone number is (571)272-9289. The examiner can normally be reached M-F 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy J Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BINH B TRAN/Primary Examiner, Art Unit 2848
Read full office action

Prosecution Timeline

Mar 22, 2024
Application Filed
Jan 10, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
92%
With Interview (+12.4%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 680 resolved cases by this examiner. Grant probability derived from career allow rate.

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