Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Objections
Claims 11-12 and 14 are objected to because of the following informalities: the limitation “polycrystalline silicone-carbide” appears to be a typographic error; it appears that Applicant meant polycrystalline silicon-carbide”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8, 11, 13, 15, 21-23, 25 and 29 are rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1).
Regarding independent claim 1: Akiyama teaches (e.g., Fig. 1) a device, comprising:
a polycrystalline silicon carbide (SiC) wafer ([0030] and [0033]: 12), and
the polycrystalline silicon carbide includes a first surface (upper surface of 12) having a roughness less than or equal to 20 Angstrom (Å) ([0168]: 1.05 nanometer, nm corresponding to 1.5 Angstrom (Å)); and
a monocrystalline silicon carbide (SiC) wafer ([0034]: 11) coupled to the first surface of the polycrystalline silicon carbide (SiC) wafer (12).
Akiyama does not expressly teach that the polycrystalline silicon carbide has
a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter).
Biard teaches a device (e.g., Fig. 1) comprising a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm (corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 2 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Regarding claim 2: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends, further comprising
a bonding layer (Akiyama: [0180]: 13; see [0082]: layer 13 used as means for bonding the substrates; thus, meets the claim limitation requirement) on the first surface (Akiyama: upper surface) of the polycrystalline silicon carbide (SiC) wafer (Akiyama: 12).
Regarding claim 3: Akiyama and Biard teach the claim limitation of the device of claim 2, on which this claim depends,
wherein the monocrystalline silicon carbide (SiC) wafer (Akiyama: 11) is on the bonding layer (Akiyama: 13) on the surface of the polycrystalline silicon carbide (SiC) wafer (Akiyama: 12) and is coupled to the first surface (upper surface) of the polycrystalline silicon carbide (SiC) wafer by the bonding layer (Akiyama: 13).
Regarding claim 4: Akiyama and Biard teach the claim limitation of the device of claim 3, on which this claim depends,
wherein: the polycrystalline silicon carbide (SiC) wafer (Akiyama: 12) includes:
a second surface (Akiyama: bottom surface) opposite to the first surface of the polycrystalline silicon carbide (SiC) layer (upper surface of polycrystalline silicon carbide (SiC) layer 12); and
a first dimension that extends from the second surface to the first surface (Akiyama: thickness of polycrystalline silicon carbide (SiC) layer 12);
the monocrystalline silicon carbide (SiC) wafer (Akiyama: 11) includes:
a third surface (Akiyama: bottom surface of 11) that faces the first surface of the polycrystalline silicon carbide (SiC) wafer (Akiyama: upper surface of polycrystalline silicon carbide (SiC) layer 12);
a fourth surface (Akiyama: upper surface of monocrystalline silicon carbide (SiC) wafer 11) that faces away from third surface and is opposite to the third surface (Akiyama: bottom surface); and
a second dimension that extends from the third surface to the fourth surface (Akiyama: thickness of monocrystalline silicon carbide (SiC) wafer 11), and the second dimension is different from the first dimension (Akiyama: thickness of monocrystalline silicon carbide (SiC) wafer 11 is different from the first dimension corresponding to thickness of polycrystalline silicon carbide (SiC) layer 12).
Regarding claim 5: Akiyama and Biard teach the claim limitation of the device of claim 4, on which this claim depends,
wherein the second dimension is less than the first dimension (Akiyama: thickness of monocrystalline silicon carbide (SiC) wafer 11, corresponding to the second dimension is less that the first dimension corresponding to thickness of polycrystalline silicon carbide (SiC) layer 12).
Regarding claim 6: Akiyama and Biard teach the claim limitation of the device of claim 5, on which this claim depends, wherein: the first dimension is less than 1000 μm (micrometers) (Akiyama: [0160]); and the second dimension is less than or equal to 1 μm (micrometers) (Akiyama: [0032]).
Regarding claim 7: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends.
Akiyama as modified by Biard teaches that the monocrystalline silicon carbide (SIC) wafer (Biard: [0041]-[0042]: 10) is directly and physically bonded to the first surface (upper surface) of the polycrystalline silicon carbide (SiC) wafer (Biard: [0041] and [0070]: 20).
Regarding claim 8: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends,
Akiyama does not expressly teach that the resistivity is less than or equal to 1 mohm-cm (milliohm-centimeter).
Biard teaches a device (e.g., Fig. 1) comprising a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm ([0041], [0077] and [0081]: polycrystalline silicon carbide 20 has a resistivity corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 1 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 1 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Regarding claim 11: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends.
wherein the polycrystalline silicon-carbide (SiC) wafer (Akiyama: [0033]: 12) has a non-columnar structure (Akiyama: Fig. 1; [0033]).
Regarding independent claim 13: Akiyama teaches (e.g., Fig. 1) a device, comprising:
a substrate ([0033] and [0036]: 10) including:
a polycrystalline silicon carbide (SiC) layer ([0030] and [0033]: 12) including: a first surface (lower surface of 12); a second surface (upper surface of 12) opposite to the first surface;
a first dimension that extends from the first surface to the second surface (thickness of polycrystalline silicon carbide (SiC) layer 12); and
a monocrystalline silicon carbide (SiC) layer ([0034]: 11) coupled to the second surface of the polycrystalline silicon carbide (SiC) layer (upper surface of 12) including:
a third surface (bottom surface of 11) on the second surface of the polycrystalline silicon carbide (SiC) layer (upper surface of 12);
a fourth surface (upper surface of monocrystalline silicon carbide layer 11) opposite to the third surface; and
a second dimension extending from the third surface to the fourth surface (thickness of monocrystalline silicon carbide layer 11), the third surface of the monocrystalline silicon carbide (SiC) layer is on a bonding layer ([0180]: 13; see [0082]: layer 13 used as means for bonding the substrates; thus, meets the claim limitation requirement 13) and faces towards the first surface of the polycrystalline silicon carbide (SiC) layer (12), and
the second dimension is less than the first dimension (Akiyama: the second dimension, thickness of monocrystalline silicon carbide (SiC) wafer 11 is less than the first dimension corresponding to thickness of polycrystalline silicon carbide (SiC) layer 12).
Akiyama does not expressly teach a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter).
Biard teaches a device (e.g., Fig. 1) comprising a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm ([0041], [0077] and [0081]: polycrystalline silicon carbide 20 has a resistivity corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 2 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Regarding claim 15: Akiyama and Biard teach the claim limitation of the device of claim 13, on which this claim depends,
wherein the polycrystalline silicon carbide (SiC) layer (Akiyama: [0033]: 12) has a non-columnar structure (Akiyama: Fig. 1, [0033]: 12).
Regarding independent claim 21: Akiyama teaches (e.g., Fig. 1) a method, comprising:
forming a polycrystalline silicon carbide (SiC) substrate ([0065] and [0100]: 12) with a resistivity;
forming a monocrystalline silicon carbide (SiC) substrate ([0081]-[0082]: the process starts with monocrystalline silicon carbide (SiC) substrate 1); and
coupling the monocrystalline SiC substrate (1) to the polycrystalline SiC substrate (12).
Akiyama does not expressly teach a resistivity less than or equal 2 mohm-cm (milliohm-centimeter);
Biard teaches a method (e.g., Fig. 1 and Figs. 2A-2F) comprising forming a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm (corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 2 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Regarding claim 22: Akiyama and Biard teach the claim limitation of the method of claim 21, on which this claim depends, further comprising:
removing a first portion ([0083]: 1a) of the monocrystalline SiC substrate ([0082]-[0083]: initially monocrystalline SiC substrate 1, which becomes 11) from the monocrystalline SiC substrate (1) leaving a second portion of the monocrystalline SiC substrate ([0082]-[0083]: 11) coupled to the polycrystalline SiC substrate (12).
Regarding claim 23: Akiyama and Biard teach the claim limitation of the method of claim 22, on which this claim depends,
wherein the second portion of the monocrystalline SiC substrate have a thickness within the range of 0.3-2 micrometers (μm), equal to 0.3 micrometers (μm), or equal to 2 micrometers (μm) (Akiyama: [0113]: 0.65 μm).
Regarding claim 25: Akiyama and Biard teach the claim limitation of the method of claim 24, on which this claim depends,
wherein the polycrystalline SiC substrate is formed on the carrier within the CVD chamber of the CVD tool by introducing a carbon gas and a nitrogen gas (Biard: [0048], [0060], [0070]-[0071] and [0101]).
Regarding claim 29: Akiyama and Biard teach the claim limitation of the method of claim 21, on which this claim depends, wherein coupling the monocrystalline SiC substrate (Biard: 10) to the polycrystalline SiC substrate (Biard: 20) further includes
directly and physically coupling a first surface (bottom surface) of the monocrystalline SiC substrate (Biard: [0041]-[0042]: 10) to a second surface (upper surface) of the polycrystalline SiC substrate (Biard: [0041] and [0070]: 20).
Claims 9-10, 16-17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Murphy et al. (US 2009/0321747 A1).
Regarding claim 9: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends.
Akiyama does not expressly teach that a warpage of the polycrystalline silicon carbide (SIC) wafer is less than 75-μm (micrometers).
Murphy teaches (e.g., Fig. 7) a device comprising a polycrystalline silicon carbide (SIC) wafer;
Murphy further teaches that a warpage of the polycrystalline silicon carbide (SIC) wafer is less than 75-μm (micrometers) ([0133]-[0134]: 10-μm).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon carbide (SIC) wafer having a warpage being less than 75-μm (micrometers), as taught by Murphy, for the benefits of reducing the possibility of wafer breakage during stacked wafers bonding.
Regarding claim 10: Akiyama and Biard teach the claim limitation of the device of claim 8, on which this claim depends,
Akiyama does not expressly teach that the warpage of the polycrystalline silicon carbide (SiC) wafer is less than 45-μm (micrometers).
Murphy teaches (e.g., Fig. 7) a device comprising a polycrystalline silicon carbide (SIC) wafer;
Murphy further teaches that a warpage of the polycrystalline silicon carbide (SIC) wafer is less than 45-μm (micrometers) ([0133]-[0134]: 10-μm).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon carbide (SIC) wafer having a warpage being less than 45-μm (micrometers), as taught by Murphy, for the benefits of reducing the possibility of wafer breakage during stacked wafers bonding.
Regarding independent claim 16: Akiyama teaches (e.g., Fig. 1) a device, comprising:
a polycrystalline silicon carbide substrate ([0030] and [0033]: 12) including: a first surface (lower surface of 12); a second surface (upper surface of 12) opposite to the first surface;
a thickness that extends from the first surface to the second surface (thickness of polycrystalline silicon carbide (SiC) layer 12), the thickness being greater than or equal to 150 μm (micrometer) ([0160]: 400 μm).
Akiyama does not expressly teach a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter); and a warpage less than 75 μm.
Biard teaches a device (e.g., Fig. 1) comprising a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm (corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 2 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 2 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Akiyama does not expressly teach that a warpage of the polycrystalline silicon carbide (SIC) wafer is less than 75-μm (micrometers).
Murphy teaches (e.g., Fig. 7) a device comprising a polycrystalline silicon carbide (SIC) wafer;
Murphy further teaches that a warpage of the polycrystalline silicon carbide (SIC) wafer is less than 75-μm (micrometers) ([0133]-[0134]: 10-μm).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon carbide (SIC) wafer having a warpage being less than 75-μm (micrometers), as taught by Murphy, for the benefits of reducing the possibility of wafer breakage during stacked wafers bonding.
Regarding claim 17: Akiyama, Biard and Murphy teach the claim limitation of the device of claim 16, on which this claim depends.
Akiyama does not expressly teach that the resistivity is less than or equal to 1 mohm-cm (milliohm-centimeter).
Biard teaches a device (e.g., Fig. 1) comprising a polycrystalline silicon carbide having a resistivity less than or equal to 0.01 ohm-cm (corresponding to less than 10 milliohm-centimeter).
It is note that this range is an overlapping range with the resistivity of less than or equal to 1 mohm-cm (milliohm-centimeter).
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the resistivity of the polycrystalline silicon carbide of Akiyama as modified by Biard, such that
the polycrystalline silicon carbide has a resistivity less than or equal to 1 mohm-cm (milliohm-centimeter), for the benefits of meeting the desired electrical characteristics of the power device.
Regarding claim 19: Akiyama and Biard and Murphy teach the claim limitation of the device of claim 16, on which this claim depends.
wherein the warpage is less than or equal to 75 μm (micrometers) (Murphy: [0133]-[0134]: 10-μm).
Regarding claim 20: Akiyama and Biard and Murphy teach the claim limitation of the device of claim 16, on which this claim depends.
wherein the thickness is at least one of the following of between 150-1000 μm (micrometers), equal to 150 μm (micrometers), and equal to 1000 μm (micrometers) (Akiyama: [0160]: 400 μm).
Claims 12 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Kubota et al. (US 2018/0251911 A1).
Regarding claim 12: Akiyama and Biard teach the claim limitation of the device of claim 1, on which this claim depends.
Akiyama does not expressly teach that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter).
Kubota teaches (e.g., Figs. 1-2) a device a polycrystalline silicon-carbide (SIC) wafer ([0049]: 11);
Kubota further teaches that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter) ([0049]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon-carbide (SIC) wafer including grains that are less than or equal to 1 mm (millimeter), as taught by Kubota, for the following benefits:
the claimed grain size makes it easy to reduce the area of the interface between a certain SiC crystal grain and the monocrystalline SiC layer 12, to suppress the localization of stress at the interface, and eventually to suppress plastic deformation of crystal lattices and to suppress motion of dislocations and hence, to maintain the quality of monocrystalline SiC layer 12 high. A crystal grain size of at least 0.1 μm makes it easy to increase the mechanical strength of polycrystalline SiC substrate 11 as handle substrate and to reduce the resistivity thereof for helping the polycrystalline SiC substrate 11 function as a semiconductor substrate (Kubota: [0049]).
Regarding claim 14: Akiyama and Biard teach the claim limitation of the device of claim 13, on which this claim depends.
Akiyama does not expressly teach that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter).
Kubota teaches (e.g., Figs. 1-2) a device a polycrystalline silicon-carbide (SIC) wafer ([0049]: 11);
Kubota further teaches that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter) ([0049]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon-carbide (SIC) wafer including grains that are less than or equal to 1 mm (millimeter), as taught by Kubota, for the following benefits:
the claimed grain size makes it easy to reduce the area of the interface between a certain SiC crystal grain and the monocrystalline SiC layer 12, to suppress the localization of stress at the interface, and eventually to suppress plastic deformation of crystal lattices and to suppress motion of dislocations and hence, to maintain the quality of monocrystalline SiC layer 12 high. A crystal grain size of at least 0.1 μm makes it easy to increase the mechanical strength of polycrystalline SiC substrate 11 as handle substrate and to reduce the resistivity thereof for helping the polycrystalline SiC substrate 11 function as a semiconductor substrate (Kubota: [0049]).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) and Murphy et al. (US 2009/0321747 A1) as applied above and further in view of Kubota et al. (US 2018/0251911 A1)
Regarding claim 18: Akiyama, Biard and Murphy teach the claim limitation of the device of claim 16, on which this claim depends.
wherein the polycrystalline silicon carbide (SiC) substrate has a non-columnar structure (Akiyama: Fig. 1; [0033]).
Akiyama does not expressly teach that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter).
Kubota teaches (e.g., Figs. 1-2) a device a polycrystalline silicon-carbide (SIC) wafer ([0049]: 11);
Kubota further teaches that the polycrystalline silicon-carbide (SIC) wafer includes grains that are less than or equal to 1 mm (millimeter) ([0049]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the device of Akiyama as modified by Biard, the polycrystalline silicon-carbide (SIC) wafer including grains that are less than or equal to 1 mm (millimeter), as taught by Kubota, for the following benefits:
the claimed grain size makes it easy to reduce the area of the interface between a certain SiC crystal grain and the monocrystalline SiC layer 12, to suppress the localization of stress at the interface, and eventually to suppress plastic deformation of crystal lattices and to suppress motion of dislocations and hence, to maintain the quality of monocrystalline SiC layer 12 high. A crystal grain size of at least 0.1 μm makes it easy to increase the mechanical strength of polycrystalline SiC substrate 11 as handle substrate and to reduce the resistivity thereof for helping the polycrystalline SiC substrate 11 functions as a semiconductor substrate (Kubota: [0049]).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Kubota et al. (US 2018/0251911 A1).
Regarding claim 24: Akiyama and Biard teach the claim limitation of the method of claim 21, on which this claim depends,
Akiyama as modified by Biard does not expressly teach that the polycrystalline SiC substrate is formed on a carrier within a chemical vapor deposition (CVD) chamber of a CVD tool by introducing a silicon containing gas.
Kubota teaches (e.g., Figs. 1-4i) a method comprising forming a polycrystalline SiC substrate ([0045]-[0048]) on a carrier within a chemical vapor deposition (CVD) chamber of a CVD tool by introducing a silicon containing gas ([0023], [0026], [0048], [0069], [0097] and [0147]; by definition, Chemical Vapor Deposition (CVD) is a vacuum-based deposition technique used to produce high-performance solid materials by exposing a substrate to volatile precursors that react or decompose on its surface; thus, the claim requirement of (CVD) chamber of a CVD tool, is met).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, the method, wherein the polycrystalline SiC substrate is formed on a carrier within a chemical vapor deposition (CVD) chamber of a CVD tool by introducing a silicon containing gas, as taught by Kubota, for the following benefits: a CVD tool deposition process is valued for its precision, uniformity, conformality, and material versatility, making it indispensable in industries requiring high-performance, durable, and complex-coating solutions.
Claim 26 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Sadayori (US 2020/0203590 A1).
Regarding claim 26: Akiyama and Biard teach the claim limitation of the method of claim 21, on which this claim depends,
Akiyama as modified by Biard does not expressly teach that the polycrystalline SiC substrate is formed by introducing a doped powder into a container of a sintering tool and sintering the doped powder within the container with the sintering tool.
Sadayori teaches (e.g., Figs. 1A-2) a method comprising forming a polycrystalline SiC substrate (Abstract; [0015], [0024], [0062]-[0064]) by introducing a doped powder into a container of a sintering tool and sintering the doped powder within the container with the sintering tool ([0015], [0024], [0062]-[0064]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the method of Akiyama as modified by Biard, the polycrystalline SiC substrate being formed by introducing a doped powder into a container of a sintering tool and sintering the doped powder within the container with the sintering tool, as taught by Sadayori, for the benefits of yielding a substrate with a superior mechanical, thermal, and chemical properties.
Claim 27 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Sadayori (US 2020/0203590 A1) as applied above and further in view of Miyakaze (US 2021/0301422 A1).
Regarding claim 27: Akiyama and Biard teach the claim limitation of the method of claim 26, on which this claim depends,
Akiyama as modified by Biard does not expressly teach sintering the doped powder includes exposing the doped powder to a temperature greater than or equal to 2000 degrees Celsius (C).
Miyakaze teaches (e.g., Figs. 1-3C) a method comprising
sintering a doped powder ([0032] and [0040]) includes exposing the doped powder to a temperature greater than or equal to 2000 degrees Celsius (C) ([0032], [0039]-[0040]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the method of Akiyama as modified by Biard, the method of sintering the doped powder includes exposing the doped powder to a temperature greater than or equal to 2000 degrees Celsius (C), as taught by Miyakaze, for the benefits of increasing the mechanical, thermal, and chemical properties, enabling more variety of use.
Claim 28 is rejected under 35 U.S.C. 103 as being unpatentable over Akiyama et al. (US 2018/0265360 A1) in view of Biard (US 2022/0415653 A1) as applied above and further in view of Miyakaze (US 2021/0301422 A1).
Regarding claim 28: Akiyama and Biard teach the claim limitation of the method of claim 21, on which this claim depends,
Akiyama as modified by Biard does not expressly teach that the polycrystalline SiC substrate is formed with a sublimation process.
Miyakaze teaches (e.g., Fig. 1) a method comprising a polycrystalline SiC substrate ([0032] and [0036]);
Miyazake further teaches that the polycrystalline SiC substrate is formed with a sublimation process ([0031]-[0032] and [0036]-[0037]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HERVE-LOUIS Y ASSOUMAN whose telephone number is (571)272-2606. The examiner can normally be reached M-F: 08:30 AM-5:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DAVIENNE MONBLEAU can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HERVE-LOUIS Y ASSOUMAN/ Examiner, Art Unit 2812
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