DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-8 and 10-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Fusaro et al (Fusaro, Us 7,253,503).
Regarding claim 1, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising an electronic device (device 56 in FIG. 5) attached to the top surface of the electrically conductive die pad ( die pad 11 in FIG. 5); a metal layer (metal layer 64) on a first surface of the die pad (die pad 11); a wire bond (wire 24 as shown in FIG. 2) attached from the electronic device to the metal layer bottom surface of the cavity (see FIG. 2 with respect to FIG. 5); and a laminate layer ( layer 21) on the metal layer; and a mold compound (modeling 25) covering the laminate layer and encapsulating the electronic device (see FIG. 5).
Regarding claim 2, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the laminate layer (layer 21) further covers an end portion of the wire bond (wire 24) that is connected to the metal layer ( layer 64).
Regarding claims 3-4, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the layer comprises Ni/Pd (col. 3).
Regarding claim 5, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the wire bond is connected from the electronic device to the metal layer in a ground area of the die pad (see FIG. 2-5).
Regarding claim 6, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the laminate layer ( layer 2121) is comprised of at least one of polypropylene, polystyrene, polyester, vinyl, polyvinyl fluoride, vinyl chloride, methyl methacrylate, nylon, and polycarbonate (see FIG. 2-5).
Regarding claim 7, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the wire bond is connected from the electronic device to the metal layer in a ground area of the die pad (see FIG. 2-5).
Regarding claim 8, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein further including a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the die pad (see FIG. 2-5).
Regarding claim 10, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising further including an opening through the die pad (see FIG. 2-5).
Regarding claim 11, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising further mold compound further fills the opening such that the mold compound extends through the die pad to a second surface of the die pad.
further including a metal plating layer on the top surface of the electrically conductive die pad and on the bottom surface of the cavity (see FIG.2-5).
Regarding claim 12, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the electronic device is an integrated circuit die and the die pad is electrically conductive (see FIG. 2-5).
Regarding claim 13, Fusaro shows an integrated circuit (packaging device 55 in FIG. 5), comprising wherein the metal layer is a plated metal layer (see FIG. 2-3).
Regarding claims 14 and 17, Fusaro shows an integrated circuit, comprising: a die pad; an electronic device attached to the die pad; a metal layer on a first surface of the die pad; a wire bond attached from the electronic device to the metal plating layer; channels or grooves cut into the metal layer and into the die pad; and a mold compound encapsulating the electronic device and extending into the channels or grooves (See FIG. 2-3).
Regarding claim 15, Fusaro shows an integrated circuit, comprising, wherein the wire bond is connected from the electronic device to the metal layer in a ground area of the die pad (see FIG. 2-3).
Regarding claim 16, Fusaro shows an integrated circuit, comprising, wherein the channels or grooves surround the ground area of the die pad (FIG. 2-5).
Regarding claim 18, Fusaro shows an integrated circuit, comprising, wherein the laminate layer further covers an end portion of the wire bond that is connected to the metal layer (see FIG. 2-5).
Regarding claim 19, Fusaro shows an integrated circuit further including an opening through the die pad (see FIG. 2-5).
Regarding claim 20, Fusaro shows an integrated circuit wherein the mold compound further fills the opening such that the mold compound extends through the die pad to a second surface of the die pad (see FIG. 2-3).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIAS M ULLAH whose telephone number is (571)272-1415. The examiner can normally be reached M-F at 8AM-5PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ELIAS ULLAH/Primary Examiner, Art Unit 2893
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