DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, 3, 4, 5, 6, 8, 11, 13, 14, 15, 16, 17, 18, 19, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Jang et al. (2022/0157730, hereafter Jang) in view of Sun et al. (2024/0243056, hereafter Sun).
Regarding claim 1, Jang discloses an electronic device, comprising: a substrate (500A2, Fig. 6, par. 0066); a first passivation structure (111, Fig. 6, par. 0033) over the substrate and defining a first opening; a first conductive pattern (122/131, Fig. 6, par. 0033) formed in the first opening; a second passivation structure (115/112, Fig. 6, par. 0033) over the first conductive pattern and the first passivation structure, wherein the second passivation structure comprises a material and a high-function material (par. 0036), wherein the material of the second passivation structure defines a second opening (112, Fig. 6, par. 0033); and a second conductive pattern (123/132, Fig. 6, par. 0033) disposed in the second opening of the second passivation structure, wherein the high-function material is disposed between the first conductive pattern and the second conductive pattern (Fig. 6).
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 2, Jang discloses an electronic device wherein the high-function material defines a first via (115, Fig. 6, par. 0036) extending through the second passivation structure (115/112, Fig. 6) to the first conductive pattern (122/131, Fig. 6), wherein the material defines a second via (132, Fig. 6, par. 0033) extending through the first via of the second passivation structure to the first conductive pattern.
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 3, Jang discloses an electronic device further comprising a seed layer (par. 0046-0047) extending through the first via (115) and the second via (132) to the first conductive pattern (122/131), wherein the material is between the high-function material (115) and the seed layer.
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 4, Jang discloses an electronic device wherein the high-function material (115) comprises a dielectric constant (Dk) less than 3.0 (par. 0036).
Regarding claim 5, Jang discloses an electronic device wherein the high-function material (115) comprises a dissipation factor (Df) less than 0.004 (par. 0036).
Regarding claim 6, Jang fails to disclose an electronic device wherein the high-resolution material comprises a material capable of patterning at a resolution value less than 2 micrometers.
However, Sun teaches an electronic device wherein the high-resolution material comprises a material capable of patterning at a resolution value less than 2 micrometers.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 8, Jang fails to disclose an electronic device wherein the substrate comprises: an electronic component; and an encapsulant disposed around lateral sides of the electronic component.
However, Sun teaches an electronic device wherein the substrate (106) comprises: an electronic component (102(1), Fig. 1, par. 0030); and an encapsulant disposed around lateral sides of the electronic component (par. 0030).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing an encapsulant around the electronic component in order to reduce or minimize warpage and avoid die interconnect breaks and delamination.
Regarding claim 11, Jang fails to disclose an electronic device further comprising an underfill disposed between the electronic component and the first passivation structure.
However, Sun teaches an electronic device further comprising an underfill disposed between the electronic component (204(1), Fig. 2) and the first passivation structure (202(1), Fig. 2) (par. 0030).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing an encapsulant around the electronic component in order to reduce or minimize warpage and avoid die interconnect breaks and delamination.
Regarding claim 13, Jang discloses an electronic device, comprising: a substrate (500A2); a first dielectric material (111) over the substrate and defining a first opening; a first conductive pattern (122/131) formed in the first opening; a second dielectric material (115) disposed over the first conductive pattern and the first dielectric material, wherein the second dielectric material comprises a high-function material (par. 0036) that defines a second opening; a third dielectric material (112) disposed over the second dielectric material and extending into the second opening, wherein the third dielectric material comprises a material that defines a third opening; and a second conductive pattern (123/132) disposed in the third opening of the material, wherein the high-function material is disposed between the first conductive pattern and the second conductive pattern (Fig. 6).
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 14, Jang discloses an electronic device wherein the high-function material defines a first via extending through the second dielectric material (115) to the first conductive pattern (122/131), wherein the material defines a second via (132) extending through the first via to the first conductive pattern (Fig. 6).
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 15, Jang discloses an electronic device wherein the high-function material comprises a dielectric constant (Dk) less than 3.0 (par. 0036).
Regarding claim 16, Jang discloses electronic device wherein the high-function material comprises a dissipation factor (Df) less than 0.004 (par. 0036).
Regarding claim 17, Jang fails to disclose an electronic device wherein the high-resolution material comprises a material capable of patterning at a resolution value less than or equal to 2 micrometers.
However, Sun teaches an electronic device wherein the high-resolution material comprises a material capable of patterning at a resolution value less than or equal to 2 micrometers (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 18, Jang discloses a method of manufacturing a semiconductor device, comprising: providing a substrate (500A2); providing a first dielectric material (111) over the substrate, wherein the first dielectric material defines a first opening; providing a first conductive pattern (122/131) in the first opening; providing a second dielectric material (115) over the first conductive pattern and the first dielectric material, wherein the second dielectric material comprises a high-function material (par. 0036) and defines a second opening; providing a third dielectric material (112) over the second dielectric material and extending into the second opening, wherein the third dielectric material comprises a material and defines a third opening; and providing a second conductive pattern (123/132) disposed in the third opening of the third dielectric material, wherein the high-function material is disposed between the first conductive pattern and the second conductive pattern (Fig. 6).
Jang fails to disclose a specifically high-resolution material.
However, Sun teaches a specifically high-resolution material (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Regarding claim 19, Jang discloses a method wherein the high-function material comprises a dielectric constant (Dk) less than 3.0 and a dissipation factor (Df) less than 0.004 (par. 0036).
Regarding claim 20, Jang fails to disclose a method wherein the high-resolution material comprises a material capable of patterning at a resolution value less than or equal to 2 micrometers.
However, Sun teaches a method wherein the high-resolution material comprises a material capable of patterning at a resolution value less than or equal to 2 micrometers (par. 0034).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang with Sun by providing a high-resolution material in order to increase transistor density and improve performance while facilitating advanced packaging architectures.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Sun as applied to claim 1 above, and further in view of Chen et al. (2024/0312796, hereafter Chen).
Regarding claim 7, Jang discloses an electronic device wherein the high-function material (115) comprises a first organic (par. 0035).
Jang and Sun fail to disclose a high-resolution material comprising a second organic.
However, Chen teaches a high-resolution material (300, Fig. 2) comprising a second organic (par. 0070).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang and Sun with Chen by providing a high-resolution material that is a second organic in order to achieve high resolution capability, enable manufacturing of fine lines, and realize 2.5D packaging with small processing difficulty and low cost.
Claims 9 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Jang and Sun as applied to claim 1 above, and further in view of Yen et al. (2023/0037201, hereafter Yen).
Regarding claim 9, Jang and Sun fail to disclose an electronic device further comprising: a thermal adhesive coupled to a top side of the electronic component; and a heat spreader coupled to the thermal adhesive.
However, Yen teaches an electronic device further comprising: a thermal adhesive (107, Fig. 1, par. 0031) coupled to a top side of the electronic component (103, Fig. 1, par. 0030); and a heat spreader (101, Fig. 1, par. 0030) coupled to the thermal adhesive.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang and Sun with Yen by implementing a heat spreader via a thermal adhesive in order to provide better adhesion to the electronic component than the thermal insulating material, and to distribute energy density across the device.
Regarding claim 10, Jang discloses an electronic device further comprising a base substrate (500A2) electrically coupled to the electronic component (310) through the first conductive pattern (122/131) and the second conductive pattern (123/132) (Fig. 6).
Jang and Sun fail to disclose a heat spreader is coupled to the base substrate.
However, Yen teaches a heat spreader (101) is coupled to the base substrate (113) (Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang and Sun with Yen by implementing a heat spreader in order to distribute energy density across the device.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Jang in view of Sun as applied to claim 1 above, and further in view of Lin et al. (2019/0139784, hereafter Lin).
Regarding claim 12, Jang and Sun fail to disclose an electronic device wherein the high-resolution material comprises a positive-type photo-sensitive polyimide (PSPI).
However, Lin teaches an electronic device wherein the high-resolution material (110, Fig. 1A) comprises a positive-type photo-sensitive polyimide (PSPI) (par. 0020).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Jang and Sun with Lin by implementing a high-resolution material with positive-type PSPI in order to allow direct, finely-detailed patterning of insulating layers.
Conclusion
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/C.M.B./Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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