CTNF 18/617,964 CTNF 69602 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-5, 8, 11, and 16 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Yu et al. (US pub 20140167254) . With respect to claim 1, Yu et al. teach a semiconductor package comprising (see figs. 1-9, particularly figs. 1 and 4 and associated text): a printed circuit board 200A comprising a first pad portion (lower or bottom portion of 208A); a semiconductor chip 10 that is mounted on the printed circuit board and comprises a second pad portion 28A; a coupling part 302 that is between the first pad portion and the second pad portion; and a spacer (upper or top portion of 208A) that is between the coupling part and the first pad portion, wherein the first pad portion and the second pad portion are electrically coupled to each other through the coupling part and the spacer. With respect to claim 2, Yu et al. teach the first pad portion and the spacer comprise the same conductive material. See figs. 1 and 4 and associated text. With respect to claim 3, Yu et al. teach the first pad portion and the spacer comprise portions of a same layer. See figs. 1 and 4 and associated text. With respect to claim 4, Yu et al. teach the spacer protrudes from the first pad portion toward the semiconductor chip. See figs. 1 and 4 and associated text. With respect to claim 5, Yu et al. teach the semiconductor chip extends in a first direction (into page) and a second direction (lateral) different from the first direction, the coupling part and the spacer are included among a plurality of coupling parts (see fig. 1) and a plurality of spacers, respectively, that are arranged along a direction parallel with the first direction, and the plurality of coupling parts and the plurality of spacers are provided at a central region of the semiconductor chip in the second direction. See figs. 1 and 4 and associated text. With respect to claim 8, Yu et al. teach the semiconductor chip extends in a first direction (into the page) and a second direction (lateral) different from the first direction, the coupling part and the spacer are included among a plurality of coupling parts and a plurality of spacers (see fig. 1), respectively, that are arranged along a direction parallel with the first direction, and the plurality of coupling parts and the plurality of spacers are adjacent to an edge of the semiconductor chip in the second direction. See figs. 1 and 4 and associated text. With respect to claim 11, Yu et al. teach the printed circuit board further comprises a passivation layer 206, the first pad portion is exposed by the passivation layer, and the spacer protrudes away from a surface of the passivation layer toward the semiconductor chip. See figs. 1 and 4 and associated text. With respect to claim 16, Yu et al. teach the printed circuit board further comprises a passivation layer 206, the first pad portion is exposed by the passivation layer, and the spacer protrudes away from a surface of the passivation layer toward the semiconductor chip. See figs. 1 and 4 and associated text . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 6, 7, 9, 10, 12, 14, 15, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu et al. (US pub 20140167254) . With respect to claims 6, 7, 9, 10, 12, 14, 15, and 19-20, Yu et al. fail to teach the ranges for the spacer thicknesses and coupling part thicknesses. However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal values or ranges for the spacer thicknesses and coupling part thicknesses through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed ranges critical or produce any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05. With respect to claims 12 and 17, Yu et al. fail to teach the ranges for the first pad portion thicknesses and the passivation layer thicknesses. However, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal values or ranges for the first pad portion thicknesses and the passivation layer thicknesses through routine experimentation and optimization to obtain optimal or desired device performance because there is no evidence indicating that claimed ranges critical or produce any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP 2144.05. With respect to claims 13 and 18, Yu et al. fail to teach the passivation layer includes a resin. However, the use of dielectric or resin as passivation material is well-known in semiconductor art. Examiner’s Cited References The cited references generally show the similar or related structure having a board having a first pad and a chip having a second pad, having a coupling part and a spacer between the first and second pads as presently claimed by applicant. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LONG PHAM whose telephone number is (571)272-1714. The examiner can normally be reached Mon-Friday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. LONG . PHAM Examiner Art Unit 2823 /LONG PHAM/Primary Examiner, Art Unit 2897 Application/Control Number: 18/617,964 Page 2 Art Unit: 2897 Application/Control Number: 18/617,964 Page 3 Art Unit: 2897 Application/Control Number: 18/617,964 Page 4 Art Unit: 2897 Application/Control Number: 18/617,964 Page 5 Art Unit: 2897 Application/Control Number: 18/617,964 Page 6 Art Unit: 2897
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