DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed November 21, 2025.
Claims 1-20 are pending. Claims 1-3, 13-15 and 20 are amended. Claims 1, 15 and 20 are independent.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55 received on May 3, 2024.
Information Disclosure Statement
Acknowledgment is made of applicant’s Information Disclosure Statement (IDS) filed on December 17, 2025. This IDS has been considered.
Drawings
The drawings are objected to because:
Figures 1A-2 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g).
Applicant’s Figures 1A-2 are described in applicant’s specification as “conventional art,” see Applicant’s Specification paragraphs 0010-0012.
Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 20 is objected to because: claim 20 is construed as independent claim drafted in a short-hand format to avoid rewriting the elements recited in claim 1. For proper fee calculation, claim 20 should be canceled or redraft them as independent claim including all the limitation of claim 1. See Ex parte Porter, 25 U.S.P.Q.2d 1147 (Bd. of Pat. App. Inter. 1992).
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 8, 11, 13-16 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Srinath et al. (U.S. 6,191,644; hereinafter “Srinath”).
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Regarding independent claim 1, Srinath discloses a capacitor action-based start-up circuit for bandgap reference (BGR) generation (see Examiner’s Markup Srinath’s Figure 2), comprising:
a start-up capacitor (Fig. 2: 60) connected to a bandgap voltage (VBG) node (see Examiner’s Markup Srinath’s Figure 2) of a BGR sub-circuit (Fig. 2: 10), the start-up capacitor (Fig. 2: 60) configured to determine whether an operating state of the BGR sub-circuit is in a normal state or a failure state (“brief power-down and power-up sequence event, and the absence of a power-up pulse on line RID,” see col. 7, ll. 44-59); and
an output transistor (Fig. 2: 70) connected to a first node of the BGR sub-circuit (Fig. 2: NBIAS), the output transistor is configured to charge the first node to change the operating state of the BGR sub-circuit to the normal state, in response to the operating state of the BGR sub-circuit being the failure state (see Abstract).
Regarding claim 2, Srinath discloses the limitations with respect to claim 1.
As discussed above, Srinath’s capacitor action-based start-up circuit is substantially identical in structure to the claimed “capacitor action-based start-up circuit,” where the differences reside only in the remaining limitations relating to function of “wherein the first node is a slowest node of the BGR sub-circuit.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Srinath’s capacitor action-based start-up circuit appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 3, Srinath discloses wherein the output transistor is further configured to:
turn off while the operating state of the BGR sub-circuit is in the normal state (see col. 6, ll. 57-67 and col. 7, ll. 1-2); and
charge the first node of the BGR sub-circuit in response to the operating state of the BGR sub-circuit being in the failure state (apply precharged power supply voltage to node NBIAS, even in the absence of an active high pulse on line RID, see col. 6, ll. 3-19).
Regarding claim 4, Srinath discloses wherein the start-up capacitor is further configured to:
maintain a voltage differential between a top plate and a bottom plate of the start-up capacitor in response to the operating state of the BGR sub-circuit being the failure state, wherein the voltage differential facilitates activation of the output transistor (see col. 6, ll. 3-19).
Regarding claim 8, Srinath discloses wherein the capacitor action-based start-up circuit further comprises:
an auxiliary network (Fig. 2: 42p, 44p, 52p and 54p) including an auxiliary transistor (Fig. 2: 52p/54p), the auxiliary network configured to control activation and deactivation of the start-up circuit (see col. 3, ll. 44-62 and col. 4, ll. 11-23); and
the auxiliary transistor configured to control a timing of the start-up circuit activation (see col. 3, ll. 44-62 and col. 4, ll. 11-23).
Regarding claim 11, Srinath discloses the limitations with respect to claim 1.
As discussed above, Srinath’s capacitor action-based start-up circuit is substantially identical in structure to the claimed “capacitor action-based start-up circuit,” where the differences reside only in the remaining limitations relating to function of “wherein an operating state of the start-up circuit is determined by a voltage of the VBG node of the BGR sub-circuit.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Srinath’s capacitor action-based start-up circuit appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding independent claim 13, Srinath discloses a system (Fig. 2), comprising:
a bandgap reference (BGR) sub-circuit (Fig. 2: 10); and
a capacitor action-based start-up circuit configured to generate a BGR voltage (see Examiner’s Markup Srinath’s Figure 2), wherein the start-up circuit comprises,
a start-up capacitor (Fig. 2: 60) connected to a bandgap voltage (VBG) node (see Examiner’s Markup Srinath’s Figure 2) of the BGR sub-circuit (Fig. 2: 10), the start-up capacitor configured to determine whether an operating state of the BGR sub-circuit is in a normal state or a failure state (“brief power-down and power-up sequence event, and the absence of a power-up pulse on line RID,” see col. 7, ll. 44-59); and
an output transistor (Fig. 2: 70) connected to a first node of the BGR sub-circuit (Fig. 2: NBIAS), the output transistor configured to charge the first node to change the operating state of the BGR sub-circuit to the normal state, in response to the operating state of the BGR sub-circuit being the failure state (see Abstract).
Regarding claim 14, Srinath discloses the limitations with respect to claim 13.
As discussed above, Srinath’s system is substantially identical in structure to the claimed “system,” where the differences reside only in the remaining limitations relating to function of “wherein the first node is a slowest node of the BGR sub-circuit.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Srinath’s system appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 15, Srinath discloses wherein the output transistor is further configured to:
turn off while the operating state of the BGR sub-circuit is in the normal state (see col. 6, ll. 57-67 and col. 7, ll. 1-2); and
charge the first node of the BGR sub-circuit in response to the operating state of the BGR sub-circuit being in the failure state (apply precharged power supply voltage to node NBIAS, even in the absence of an active high pulse on line RID, see col. 6, ll. 3-19).
Regarding claim 16, Srinath discloses wherein the start-up capacitor is further configured to:
maintain a voltage differential between a top plate and a bottom plate of the start-up capacitor in response to the operating state of the BGR sub-circuit being the failure state, wherein the voltage differential facilitates activation of the output transistor (see col. 6, ll. 3-19).
Regarding claim 18, Srinath discloses wherein the capacitor action-based start-up circuit further comprises:
an auxiliary network (Fig. 2: 42p, 44p, 52p and 54p) including an auxiliary transistor (Fig. 2: 52p/54p), the auxiliary network configured to control activation and deactivation of the start-up circuit (see col. 3, ll. 44-62 and col. 4, ll. 11-23); and
the auxiliary transistor configured to control a timing of the start-up circuit activation (see col. 3, ll. 44-62 and col. 4, ll. 11-23).
Regarding claim 19, Srinath discloses the limitations with respect to claim 13.
As discussed above, Srinath’s system is substantially identical in structure to the claimed “system,” where the differences reside only in the remaining limitations relating to function of “wherein an operating state of the start-up circuit is determined by a voltage of the VBG node of the BGR sub-circuit.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Srinath’s system appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding independent claim 20, Srinath discloses a method of operating the start-up circuit of claim 1, the method comprising:
turning off while the operating state of the BGR sub-circuit is in the normal state (see col. 6, ll. 57-67 and col. 7, ll. 1-2); and
charging the first node of the BGR sub-circuit in response to the operating state of the BGR sub-circuit being in the failure state (apply precharged power supply voltage to node NBIAS, even in the absence of an active high pulse on line RID, see col. 6, ll. 3-19).
Allowable Subject Matter
Claims 5-7, 9-10, 12 and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
With respect to claim 5, there is no teaching or suggestion in the prior art of record to provide the recited the operating state of the BGR sub-circuit being the normal state the top plate of the start-up capacitor is configured to be charged to VDD-VTHDIODE the bottom plate of the start-up capacitor is configured to be charged to a voltage of the VBG node the start-up circuit is configured to be in an OFF state and the output transistor is configured to be turned off.
With respect to claim 6, there is no teaching or suggestion in the prior art of record to provide the recited the operating state of the BGR sub-circuit being the failure state, the output transistor is further configured to be switched on in response to the top plate of the start-up capacitor being charged to VDD-VTHDIODE- the voltage differential, the bottom plate of the start-up capacitor is further configured to be charged to a difference between a voltage of the VBG node and the voltage differential, and the start-up circuit is further configured to be turned on and change a condition of a memory node to be |VTHMOS| > VTHDIODE.
With respect to claim 7, there is no teaching or suggestion in the prior art of record to provide the recited transition from 1.2V in response to the operating state of the BGR sub-circuit being the normal state, to VTHDIODE in response to the operating state of the BGR sub-circuit being the failure state, wherein the VTHDIODE varies between 0.5V to 0.7V.
With respect to claim 9, there is no teaching or suggestion in the prior art of record to provide the recited failsafe mechanism including a failsafe transistor, the failsafe mechanism configured to protect the auxiliary network from false charging during one or more failure conditions while the BGR sub-circuit is powering up.
With respect to claim 10, there is no teaching or suggestion in the prior art of record to provide the recited delay deactivation of the auxiliary transistor to facilitate a proper charging of the start-up capacitor to VDD-VTHDiode voltage.
With respect to claim 12, there is no teaching or suggestion in the prior art of record to provide the recited start-up circuit comprises a diode, the diode configured to decrease a probability of zero reverse current, an auxiliary transistor configured to be switched off in response to the start-up circuit being activated, and a top plate of the start-up capacitor is configured to charge to VDD-VTHDiode a single time in response to the start-up circuit being activated.
With respect to claim 17, there is no teaching or suggestion in the prior art of record to provide the recited the operating state of the BGR sub-circuit being the failure state, the output transistor is further configured to be switched on in response to the top plate of the start-up capacitor being charged to VDD-VTHDIODE- the voltage differential, the bottom plate of the start-up capacitor is further configured to be charged to a difference between a voltage of the VBG node and the voltage differential, and the start-up circuit is further configured to be turned on and change a condition of a memory node to be |VTHMOS| > VTHDIODE.
Response to Arguments
With respect to the drawing objection, Applicant asserts that replacement sheets were included with amendments to Figures 1A to 2 to overcome the drawing objection. However, no replacement sheets were filed.
Applicant’s arguments with respect to claims 1-4, 8, 11, 13-16 and 18-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alfredo Bermudez Lozada/ Primary Examiner, Art Unit 2825