Prosecution Insights
Last updated: July 17, 2026
Application No. 18/618,498

SCHOTTKY DIODE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING THE SAME

Non-Final OA §102
Filed
Mar 27, 2024
Priority
Jan 23, 2024 — RE 10-2024-0010244
Examiner
LE, THAO P
Art Unit
Tech Center
Assignee
Db Hitek Co. Ltd.
OA Round
1 (Non-Final)
93%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
747 granted / 807 resolved
+32.6% vs TC avg
Minimal -1% lift
Without
With
+-1.0%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
13 currently pending
Career history
820
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
62.7%
+22.7% vs TC avg
§102
19.6%
-20.4% vs TC avg
§112
2.2%
-37.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 807 resolved cases

Office Action

§102
DETAILED ACTION Information Disclosure Statement The information disclosure statement (IDS) submitted on 03/27/24 was filed after the mailing date of the application. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 10, 11, 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamamoto, U.S. Pub. No. 2014/0284754. Regarding claim 1, Yamamoto discloses a semiconductor circuit device comprising: a substrate; a buried layer (barrier) disposed on one side of the substrate; a well including a semiconductor region disposed on one side of the buried layer (Fig. 11), and a Schottky diode portion (AD1-AD4) disposed on one side of the well; wherein the Schottky diode AD1 portion comprises an anode A4, a guard ring 24, A53 (Fig. 19) electrically connected with the anode, and a poly field plate (metal plate, [0235]) electrically connected with the anode and the guard ring, and the guard ring comprises at least one slit A18, A48 (Fig. 19) configured to block a flow of current. Regarding claim 11, Yamamoto discloses a Schottky diode portion disposed on one side of a well, comprising: a Schottky diode portion (AD1-AD4) disposed on one side of the well; wherein the Schottky diode AD1 portion comprises an anode A4, a guard ring 24, A53 (Fig. 19) electrically connected with the anode, and a poly field plate (metal plate, [0235]) electrically connected with the anode and the guard ring, and the guard ring comprises at least one slit A18, A48 (Fig. 19) configured to block a flow of current. Regarding claims 10, 20, Yamamoto discloses wherein the Schottky diode A41, AD11-AD44 ([0002], [0245]-[0293]): a cathode 88 disposed to surround the anode 83, the guard ring A53 and poly field plate, and an insulator configured to electrically separate the anode and cathode, and wherein the insulator comprises a STI (the well in the substrate). Allowable Subject Matter Claims 2-9, 12-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, since the prior made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitations having the limitations of claim 1 wherein the slit is formed to penetrate at least one region of the guard ring. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAO P LE whose telephone number is (571)272-1785. The examiner can normally be reached on Monday-Friday 9AM-6PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached on 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 703-872-9306. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /THAO P LE/Primary Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Mar 27, 2024
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12685057
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF
2y 12m to grant Granted Jul 14, 2026
Patent 12684853
SILICON CARBIDE SEMICONDUCTOR DEVICE
2y 4m to grant Granted Jul 14, 2026
Patent 12672586
MICROELECTRONIC DEVICE PACKAGES INCLUDING WIREBONDING AND RELATED METHODS, MEMORY DEVICES, AND ELECTRONIC SYSTEMS
3y 7m to grant Granted Jun 30, 2026
Patent 12672554
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
2y 8m to grant Granted Jun 30, 2026
Patent 12666829
DISPLAY SUBSTRATE AND DISPLAY DEVICE
3y 0m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
93%
Grant Probability
92%
With Interview (-1.0%)
1y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 807 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month