DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 7/1/2026 is acknowledged.
Claims 19-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 7/1/2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 and 11-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xie et al. (US PG Pub 2023/0178433, hereinafter Xie).
Regarding claim 1, figure 16 of Xie discloses a semiconductor integrated circuit (IC) device comprising:
a first transistor comprising a first source/drain (S/D) region (50, second from the left) and a second transistor comprising a second S/D region (50, third from the left);
a first backside contact (56) directly coupled to a bottom surface of the first S/D region;
a second backside contact (56) directly coupled to a bottom surface of the second S/D region; and
a sidewall spacer (54) directly coupled to a sidewall of the first backside contact and directly coupled to a sidewall of the second backside contact.
Regarding claim 2, figure 16 of Xie discloses the first S/D region and the second S/D region are oppositely doped (¶ 42 discloses CMOS cells which comprise n-type and p-type transistors).
Regarding claim 3, figure 16 of Xie discloses a top surface of the first backside contact (56) is above a top surface of the second backside contact (when device is tilted at an angle).
Regarding claim 4, figure 16 of Xie discloses the top surface of the first backside contact (56) is inset within the first S/D region (50).
Regarding claim 5, figure 16 of Xie discloses a bottom surface of the second S/D region (50) is below a bottom surface of the first S/D region (when device is tilted at an angle).
Regarding claim 11, figure 16 of Xie discloses a semiconductor integrated circuit (IC) device comprising:
a first transistor cell comprising a first pair of n-type transistors;
a second transistor cell comprising a second pair of p-type transistors (¶ 42 discloses CMOS cells which comprise n-type and p-type transistors);
a first backside contact (56) directly coupled to a n-type source/drain (S/D) region of the first transistor cell;
a second backside contact (56) directly coupled to a p-type S/D region of the second transistor cell; and
a sidewall spacer (54) directly coupled to a sidewall of the first backside contact and directly coupled to a sidewall of the second backside contact.
Regarding claim 12, figure 16 of Xie discloses a top surface of the first backside contact (56) is above a top surface of the second backside contact (when device is tilted at an angle).
Regarding claim 13, figure 16 of Xie discloses the top surface of the first backside contact (56) is inset within the first S/D region (50).
Regarding claim 14, figure 16 of Xie discloses a bottom surface of the second S/D region (50) is below a bottom surface of the first S/D region (when device is tilted at an angle).
Allowable Subject Matter
Claims 6-10 and 15-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claims 6 and 15, the closest prior art of record, Xie et al. (US PG Pub 2023/0178433), either singularly or in combination, does not disclose or suggest the combination of limitations including “the first backside contact comprises a crescendoing sidewall from vertical toward a bottom surface of the first backside contact and a decrescendoing sidewall from vertical toward a bottom surface of the first backside contact”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU-HSI DAVID SUN whose telephone number is (571)270-5773. The examiner can normally be reached Mon-Fri 8am-4pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/YU-HSI D SUN/Primary Examiner, Art Unit 2817
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