Prosecution Insights
Last updated: October 02, 2026
Application No. 18/621,738

METHODS OF FORMING MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MICROELECTRONIC DEVICES

Non-Final OA §103
Filed
Mar 29, 2024
Priority
May 01, 2023 — provisional 63/499,306
Examiner
ERDEM, FAZLI
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
925 granted / 1083 resolved
+25.4% vs TC avg
Strong +16% interview lift
Without
With
+15.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
21 currently pending
Career history
1102
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
50.2%
+10.2% vs TC avg
§102
38.0%
-2.0% vs TC avg
§112
7.4%
-32.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1083 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 13-20 in the reply filed on 6/16/2026 is acknowledged. Claims 1-12 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a non-elected method claims, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 6/16/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 13-20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (20220130860) in view of Lin et al. (20220077190) Regarding Claim 13, in Figs. 9B, 9D, 10I and in paragraphs 0104, 0106, 0107, and 0137 Choi discloses a microelectronic device, comprising: a stack structure overlying a source tier, the stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers; a staircase structure SWI within the stack structure and having steps comprising lateral edges of the tiers; conductive contacts 397A within a horizontal area of the staircase structure and vertically extending through the stack structure to the source tier. Choi fails to disclose the limitation strapping structures within horizontal areas of the steps of the staircase structure and individually laterally intervening directly between one of the conductive contacts and the conductive structure of one of the tiers of the stack structure, the strapping structures coupled to conductive features within the source tier through the conductive contacts. However, Lin et al. discloses a memory device where in Figs. 11F and 11G and elements 130/130A/130BP, the required strapping structures are disclosed. It would have been obvious to one of having ordinary skill in the art before the effective filing date of the claimed invention to have the required strapping structure in Choi as taught by Lin et al. in order to have increased gap filling ability and hence increased reliability. Regarding Claim 14, in paragraph 0045 of Lin et al, it is disclosed a High-K dielectric material adjacent to the insulative structures of the stack structure, the High-K dielectric material substantially surrounding the strapping structures on three consecutive sides. Regarding Claim 15, in paragraphs 0103, 0106, 0108 of Lin et al., the strapping structures 130/130A/130BP substantially laterally surround the conductive contacts; and conductive material of the conductive structures of the tiers of the stack structure substantially laterally surrounds each of the strapping structures. Regarding Claim 16, in paragraphs 0043, 0044, 0158, 0161, 0175 and 0177 of Choi, the conductive contacts comprise portions of conductive material of the conductive structures of the stack structure at least partially laterally surrounding additional conductive material. Regarding Claim 17, in paragraphs 0043, 0044, 0158, 0161, 0175 and 0177 of Choi, the conductive contacts vertically extend through the stack structure from an upper surface of the stack structure to additional conductive structures within the source tier, each of the conductive contacts exhibiting substantially the same vertical height. Regarding Claim 18, in paragraphs 0039 of Lin et al, the strapping structures 130/130A/130BP comprise conductive pad structures at the steps of the staircase structure, the conductive pad structures comprising first portions laterally adjacent to the conductive structures and second portions having relatively larger thickness laterally adjacent to the first portions and substantially laterally surrounding the conductive contacts. Regarding Claim 19, in paragraphs 0039, 0044, 0062 and 0063 of Lin et al, the strapping structures 130/130A/130BP, are individually vertically adjacent to the insulative structure of the one of the tiers of the stack structure. Regarding Claim 20, in paragraphs 0055 and 0084, of Lin et al, a material composition of the strapping structures is substantially the same as a material composition of the conductive structures of the stack structure; and a material composition of the conductive contacts differs from the material composition of each of the strapping structures and the conductive structures. Examiner is including Conti (20240079057) as a pertinent prior art that is not relied upon that discloses strapping structures in relationship to the sourc/drain/implant/doping regions (see paragraphs 0103 and 0107) Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FAZLI ERDEM/Primary Examiner, Art Unit 2812 9/21/2026
Read full office action

Prosecution Timeline

Mar 29, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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MAGNETIC MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
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Patent 12740395
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Patent 12733192
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+15.9%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1083 resolved cases by this examiner. Grant probability derived from career allowance rate.

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