DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group III, claims 18-34, in the reply filed on 4/10/2026 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 18-24, 26-32, and 34 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vadakkanmaruveedu (US 20150220125 A1) in view of Bezama (US 6330157 B1).
As to claims 18 and 26, Vadakkanmaruveedu discloses: A device (portable computing device; par. 0006)) comprising:
an integrated circuit (par. 0024-0025); and
logic to control heat generation by the integrated circuit based on a determination of thermal resistance (managing thermal energy generation based on tracked thermal resistance/instantaneous thermal resistance; see par. 0005, 0007-0014, 0032-0040);
in order to calculate optimum power settings based on a tracked thermal resistance value (par. 0005).
Vadakkanmaruveedu does not explicitly disclose (in the current embodiment):
a cooling element; and
thermal resistance between the integrated circuit and the cooling element.
However, Bezama discloses:
providing an integrated circuit (chip, col. 2, lines 9-48) with a cooling element (heat sink/cooling device; col. 2, lines 9-48); and
thermal resistance between the integrated circuit and the cooling element (assembly thermal resistance; col. 2, lines 9-48);
in order to cool the integrated circuit (col. 2, lines 9-48).
It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device/method of Vadakkanmaruveedu as suggested by Bezama, e.g., providing:
a cooling element; and
logic to control heat generation by the integrated circuit based on a determination of thermal resistance between the integrated circuit and the cooling element;
in order to cool the integrated circuit (as in Bezama) and calculate optimum power settings based on a tracked thermal resistance value (as in Vadakkanmaruveedu).
Additionally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination/modification would have yielded predictable results to one of ordinary skill in the art before the effective filing date of the claimed invention. See KSR International Co. v. Teleflex Inc., 550 U.S.___, 82 USPQ2d 1385 (2007).
As to claims 19 and 27, Vadakkanmaruveedu in view of Bezama discloses:
wherein the determination of thermal resistance further utilizes a thermal mass of the integrated circuit (thermal mass of the assembly, including the thermal mass of the integrated circuit, affects the operating temperature and thermal transient response of the system; see col. 3, lines 11-30, Bezama; thus repeatedly measuring the instantaneous temperatures of the IC is considered to be utilizing, at least indirectly, the thermal mass of the integrated circuit; par. 0081, 0083; Vadakkanmaruveedu).
As to claims 20 and 28, Vadakkanmaruveedu in view of Bezama discloses:
wherein the determination of thermal resistance further utilizes a thermal mass of the cooling element (thermal mass of the assembly, including the thermal mass of the cooling element, affects the operating temperature and thermal transient response of the system; see col. 3, lines 11-30, Bezama; thus repeatedly measuring the instantaneous temperatures of the IC is considered to be utilizing, at least indirectly, the thermal mass of the cooling element; par. 0081, 0083; Vadakkanmaruveedu).
As to claims 21 and 29, Vadakkanmaruveedu in view of Bezama discloses:
wherein the determination of thermal resistance further utilizes a rate of heat transfer between the integrated circuit and the cooling element (repeatedly measuring the instantaneous temperatures of the IC and the ambient environment is considered to be utilizing, at least indirectly, the rate of heat transfer from the IC to the cooling element and from the cooling element to the environment; par. 0081, 0083; Vadakkanmaruveedu).
As to claims 22 and 30, Vadakkanmaruveedu in view of Bezama discloses:
wherein the determination of thermal resistance further utilizes a rate of heat transfer between the cooling element and an environment (repeatedly measuring the instantaneous temperatures of the IC and the ambient environment is considered to be utilizing, at least indirectly, the rate of heat transfer from the IC to the cooling element and from the cooling element to the environment; par. 0081, 0083; Vadakkanmaruveedu).
As to claims 23 and 31, Vadakkanmaruveedu in view of Bezama discloses:
further comprising:
at least one thermal sensor (par. 0007-0011; Vadakkanmaruveedu) configured to measure a temperature of the integrated circuit (instantaneous operating temperature; par. 0010); and
at least one additional sensor configured to measure a parameter (active power level; par. 0007; temperature of ambient environment; par. 00111) indicative of heat transfer, wherein the logic to control heat generation determines the thermal resistance (instantaneous thermal resistance; par. 0007-0013) based on outputs of the sensors.
As to claims 24 and 32, Vadakkanmaruveedu in view of Bezama discloses:
wherein the parameter indicative of heat transfer comprises a power consumption metric (active power level; par. 0007; Vadakkanmaruveedu) for the integrated circuit.
As to claims 26-32, the products of claims 18-24 above inherently necessitate the method limitations of claims 26-32.
As to claim 34, Vadakkanmaruveedu discloses: A data center (portable computing device; par. 0006) comprising:
a plurality of integrated circuits (one or more components, par. 0007; see also par. 0024-0025); and
heat regulation logic configured to determine thermal resistances (managing thermal energy generation based on tracked thermal resistance/instantaneous thermal resistance; see par. 0005, 0007-0014, 0032-0040) and to control heat generation by the integrated circuits based on a determined thermal resistances;
in order to calculate optimum power settings based on tracked thermal resistance values (par. 0005).
Vadakkanmaruveedu does not explicitly disclose (in the current embodiment):
the integrated circuits each coupled to a cooling element; and
thermal resistances between the integrated circuits and the cooling elements.
However, Bezama discloses:
providing an integrated circuit (chip, col. 2, lines 9-48) coupled with a cooling element (heat sink/cooling device; col. 2, lines 9-48); and
thermal resistance between the integrated circuit and the cooling element (assembly thermal resistance; col. 2, lines 9-48);
in order to cool the integrated circuit (col. 2, lines 9-48).
It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device of Vadakkanmaruveedu as suggested by Bezama, e.g., providing:
the plurality of integrated circuits each coupled to a cooling element; and
heat regulation logic configured to determine thermal resistances between the integrated circuits and the cooling elements and to control heat generation by the integrated circuits based on the determined thermal resistances;
in order to cool the integrated circuits (as in Bezama) and calculate optimum power settings based on tracked thermal resistance values (as in Vadakkanmaruveedu).
Regarding the preamble, “A data center”, if the body of a claim fully and intrinsically sets forth all of the limitations of the claimed invention, and the preamble merely states, for example, the purpose or intended use of the invention, rather than any distinct definition of any of the claimed invention’s limitations, then the preamble is not considered a limitation and is of no significance to claim construction. Pitney Bowes, Inc. v. Hewlett-Packard Co., 182 F.3d 1298, 1305, 51 USPQ2d 1161, 1165 (Fed. Cir. 1999). See also Rowe v. Dror, 112 F.3d 473, 478, 42 USPQ2d 1550, 1553 (Fed. Cir. 1997) (“where a patentee defines a structurally complete invention in the claim body and uses the preamble only to state a purpose or intended use for the invention, the preamble is not a claim limitation”); Kropa v. Robie, 187 F.2d at 152, 88 USPQ2d at 480-81.
In the instant case, the term “data center” merely recites the purpose or intended use of the invention, rather than any distinct definition of any of the claimed invention’s limitations. Accordingly, the preamble is not considered a limitation and is of no significance to claim construction.
Further, if a prior art structure is capable of performing the intended use as recited in the preamble, then it meets the claim. See, e.g., In re Schreiber, 128 F.3d 1473, 1477, 44 USPQ2d 1429, 1431 (Fed. Cir. 1997).
In the instant case, the device of Vadakkanmaruveedu in view of Bezama is capable of performing the intended use.
Additionally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination/modification would have yielded predictable results to one of ordinary skill in the art before the effective filing date of the claimed invention. See KSR International Co. v. Teleflex Inc., 550 U.S.___, 82 USPQ2d 1385 (2007).
Claim(s) 25 and 33 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vadakkanmaruveedu (US 20150220125 A1) in view of Bezama (US 6330157 B1) as applied to claims 23 and 31 above, and further in view of Dockerty (US 6053394 A).
As to claims 25 and 33, Vadakkanmaruveedu in view of Bezama does not explicitly disclose:
wherein the determination of thermal resistance is further based on detected engagement between one or more contact elements connecting the cooling element to the integrated circuit.
However, Dockerty discloses:
wherein the determination of thermal resistance is further based on detected engagement (thermal resistance is inversely related to clamping pressure; col. 2, lines 3-5) between one or more contact elements (contact surfaces of the cooling element 9 and integrated circuit 2; Fig. 3; and/or thermal epoxy; col. 4, lines 65-66) connecting the cooling element to the integrated circuit;
in order to determine the thermal resistance between the cooling element and the integrated circuit (col. 2, lines 3-5) and/or in order to bond the cooling element to the integrated circuit (col. 4, lines 65-66).
It would have been obvious to one of ordinary skill in the related art(s) before the effective filing date of the claimed invention to modify the device/method of Vadakkanmaruveedu and Bezama as suggested by Dockerty, e.g., providing:
wherein the determination of thermal resistance is further based on detected engagement between one or more contact elements connecting the cooling element to the integrated circuit;
in order to determine the thermal resistance between the cooling element and the integrated circuit and/or in order to bond the cooling element to the integrated circuit.
Since thermal resistance is inversely related to clamping pressure/surface contact engagement (as disclosed in Dockerty), repeatedly calculating the instantaneous thermal resistance by repeatedly measuring the instantaneous temperature of the IC (par. 0081, 0083; Vadakkanmaruveedu) is considered to be based on, at least indirectly, the detected engagement between contact elements connecting the cooling element to the integrated circuit (instantaneous temperatures of the IC will be based on the clamping pressure/contact element engagement, thus detecting the temperature and detecting the instantaneous thermal resistance corresponds to at least indirectly detecting engagement between contact elements).
Additionally, all claimed elements were known in the prior art and one skilled in the art could have combined/modified the elements as claimed by known methods with no change in their respective functions, and the combination/modification would have yielded predictable results to one of ordinary skill in the art before the effective filing date of the claimed invention. See KSR International Co. v. Teleflex Inc., 550 U.S.___, 82 USPQ2d 1385 (2007).
As to claim 33, the product of claim 25 above inherently necessitates the method limitations of claim 33.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Chainer (US 20160252408 A1), Wyatt (US 20110055597 A1), and Mittal (US 20160062422 A1) disclose conventional heat generation logic/cooling elements.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB R CRUM whose telephone number is (571)270-7665. The examiner can normally be reached Monday - Friday 9:00 am - 5:00 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jayprakash Gandhi can be reached at (571) 270-1985. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JACOB R CRUM/ Primary Examiner, Art Unit 2841
Prosecution Insights