DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7,11-18 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Yang et al., (Yang) US 2022/0367347.
Regarding claim 1, Yang shows in FIG. 1I-25, a semiconductor die (die), comprising: a die interconnect (120)(having the interconnect)[0050]; a semiconductor layer extending in a first direction; a die level distribution (DLD) metallization structure (130,150)[0055]; and a back end of line (BEOL) interconnect structure (101) between the semiconductor layer and the DLD metallization structure, the BEOL interconnect structure (100) extending in a second direction orthogonal to the first direction and including an outer metallization layer (240,250)[0077]; the DLD metallization structure comprising: the outer metallization layer extending in the first direction; a first passivation layer (150) extending in the first direction adjacent to the outer metallization layer; and a DLD metallization layer (130,150)[0082] extending in the first direction and adjacent to the first passivation layer (150), the DLD metallization layer comprising: a metal line (182) extending in the first direction and having a first width in a third direction orthogonal to the second direction; and a metal pad (inside 182) [0084] disposed in the metal line and having a second width in the third direction which is greater than the first width, the metal pad (182 portion) coupled to the die interconnect (240).
Regarding claim 2, Yang shows in FIG. 1I-25, a semiconductor die, wherein the die interconnect (240,250) has a circular base [0096, 0112] having a third width extending in the third direction which is greater than the first width.
Regarding claim 3, Yang shows in FIG. 1I-25, a semiconductor die wherein the die interconnect has an oblong base [0096,0112] having the third width extending in the third direction and having a fourth width extending in a fourth direction orthogonal to the third direction and is greater than the third width.
Regarding claim 4,5, Yang shows in FIG. 1I-25, a semiconductor die, a semiconductor die wherein the metal pad has a uniform octagonal shape; wherein the metal pad has an oblong octagonal shape [0096,0112].
Regarding claim 6, Yang shows in FIG. 1I-25, a semiconductor die, wherein the DLD metallization structure further comprises: a second passivation layer (190) extending in the first direction adjacent to the DLD metallization layer, wherein the second passivation layer (190) includes a first opening adjacent to the metal pad (182).
Regarding claim 7, Yang shows in FIG. 1I-25, a semiconductor die, wherein the DLD metallization structure further comprises: a polymer dielectric layer (230) [0076] extending in the first direction adjacent to the second passivation layer (190), wherein the polymer dielectric layer includes a second opening adjacent to the first opening.
Regarding claim 11, Yang shows in FIG. 1I-25, 11. The semiconductor die of claim 1 integrated into a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; avionics systems; and a multicopter [0003,0004,0045].
Regarding claim 12, Yang shows in FIG. 1I-25, a method of fabricating a semiconductor die (die) including a die interconnect (120) and a metallization layer including a metal line and a metal pad (182) having a width greater than a width of the metal line for improved signal path conductivity between the die interconnect and the metal pad, comprising: fabricating the die interconnect; fabricating a semiconductor layer (110) extending in a first direction; fabricating a die level distribution (DLD) metallization structure (150); and fabricating a back end of line (BEOL) interconnect structure between the semiconductor layer and the DLD metallization structure, the BEOL interconnect structure extending in a second direction orthogonal to the first direction and including an outer metallization layer (250) extending in the first direction; wherein fabricating the DLD metallization structure comprises: fabricating a first passivation layer (150) extending in the first direction adjacent to the outer metallization layer; and fabricating a DLD metallization layer (inside 150) extending in the first direction and adjacent to the first passivation layer, wherein fabricating the DLD metallization layer comprises: fabricating the metal line (182) extending in the first direction and having a first width in a third direction orthogonal to the second direction; and fabricating the metal pad disposed in the metal line (182) and having a second width in the third direction which is greater than the first width, the metal pad coupled to the die interconnect.
Regarding claim 13, Yang shows in FIG. 1I-25, a method wherein the die interconnect has a circular base having a third width extending in the third direction which is greater than the first width [0096,0112].
Regarding claim 14, Yang shows in FIG. 1I-25, a method wherein the die interconnect has an oblong base having the third width extending in the third direction and having a fourth width extending in a fourth direction orthogonal to the third direction and is greater than the third width [0096,0112].
Regarding claims 15,16, Yang shows in FIG. 1I-25, a method wherein the metal pad has a uniform octagonal shape; wherein the metal pad has an oblong octagonal shape [0096,0112].
Regarding claims 17, Yang shows in FIG. 1I-25, a method wherein the DLD metallization structure further comprises: a second passivation layer (190) extending in the first direction adjacent to the DLD metallization layer (150,140), wherein the second passivation layer (190) includes a first opening adjacent to the metal pad.
Regarding claim 18, Yang shows in FIG. 1I-25, a method wherein the DLD metallization structure further comprises: a polymer dielectric layer (230)[0076] extending in the first direction adjacent to the second passivation layer (190), wherein the polymer dielectric layer (230) includes a second opening adjacent to the first opening.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 8-10,19,20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang.
Regarding claims 8-10,19,20, Yang discloses [0078,0126], a device wherein the first opening has a first opening width of 5 μm to about 22 μm, and a length.
As for the opening being 25 micrometers (μm) and a length of 35 μm; wherein the second opening has a second opening width in a first range between 10-20 micrometers (μm) and a length in a second range between 20-30 μm; wherein a distance between the first opening and the second opening is greater than or equal to 2 micrometers (μm) in the first direction; wherein the first opening has a first opening width of 25 micrometers (μm) and a length of 35 μm; wherein the second opening has a second opening width in a first range between 10-20 micrometers (μm) and a length in a second range between 20-30 μm, Applicant did not show criticality of the particular optimum value of the opening and lengths. To establish unexpected results over a claimed range or optimum value, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC-ANTHONY ARMAND whose telephone number is (571)272-5178. The examiner can normally be reached 8am-5pm.
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MARC - ANTHONY ARMAND
Primary Examiner
Art Unit 2813
/MARC-ANTHONY ARMAND/Primary Examiner, Art Unit 2813
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