DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Application filed April 2, 2024.
Claims 1-28 and 54-55 are pending. Claims 29-53 and 56-61 are withdrawn due to a Restriction Requirement. Claim 1 is independent.
Election/Restrictions
Claims 29-53 and 56-61 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on April 23, 2026.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55 received on April 11, 2024.
Information Disclosure Statement
Acknowledgment is made of applicant’s Information Disclosure Statement (IDS) filed on May 10, 2024. This IDS has been considered.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided.
The abstract of the disclosure is objected to because it contains a phrase that can be implied (i.e. “The disclosure describes”). A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-2 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2 of copending Application No. 18/817,353 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because: application claims 1-2 are anticipated by 18/817,353 claims 1-2.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Allowable Subject Matter
Claims 3-28 and 54-55 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With respect to claim 3, there is no teaching or suggestion in the prior art of record to provide the recited first memory cell, the second memory cell, the third memory cell, and the fourth memory cell are formed in a semiconductor region having a first conductivity type, and the first memory cell, the second memory cell, the third memory cell, and the fourth memory cell commonly comprise: a first gate dielectric block, a second gate dielectric block, a third gate dielectric block, and a fourth gate dielectric block respectively formed on the semiconductor region; a first conductive gate, a second conductive gate, a third conductive gate, and a fourth conductive gate respectively formed on the first gate dielectric block, the second gate dielectric block, the third gate dielectric block, and the fourth gate dielectric block; a first heavily-doped area and a second heavily-doped area formed in the semiconductor region, respectively formed on two opposite side of the semiconductor region, which is directly arranged under the first conductive gate, and respectively coupled to the first word bit line and the first common-source line, wherein the first heavily-doped area and the second heavily-doped area have a second conductivity type opposite to the first conductivity type; a third heavily-doped area formed in the semiconductor region, the second heavily-doped area and the third heavily-doped area are respectively formed on two opposite side of the semiconductor region, which is directly arranged under the second conductive gate, the third heavily-doped area is coupled to the second word bit line, and the third heavily-doped area has the second conductivity type; a fourth heavily-doped area formed in the semiconductor region, the third heavily-doped area and the fourth heavily-doped area are respectively formed on two opposite side of the semiconductor region, which is directly arranged under the third conductive gate, the fourth heavily-doped area is coupled to the second common-source line, and the fourth heavily-doped area has the second conductivity type; and a fifth heavily-doped area formed in the semiconductor region, the fourth heavily-doped area and the fifth heavily-doped area are respectively formed on two opposite side of the semiconductor region, which is directly arranged under the fourth conductive gate, the fifth heavily-doped area is coupled to the first word bit line, and the fifth heavily-doped area has the second conductivity type.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Alfredo Bermudez Lozada/Primary Examiner, Art Unit 2825
Prosecution Insights