Prosecution Insights
Last updated: July 17, 2026
Application No. 18/624,902

PHOTONIC SYSTEM INCLUDING MICRO RING MODULATOR AND METHOD OF USING

Final Rejection §102§103
Filed
Apr 02, 2024
Priority
Jun 15, 2022 — divisional of 11/953,721
Examiner
CHIEM, DINH D
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
2 (Final)
72%
Grant Probability
Favorable
3-4
OA Rounds
9m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 72% — above average
72%
Career Allowance Rate
393 granted / 542 resolved
+4.5% vs TC avg
Strong +16% interview lift
Without
With
+16.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
33 currently pending
Career history
590
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
83.9%
+43.9% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
0.7%
-39.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 542 resolved cases

Office Action

§102 §103
DETAILED ACTION This office action is in response to applicant’s amendment filed on December 17, 2025. Claims 1-10 and 21-30 are pending. The examiner notes, the claim status for claim 21 is incorrect since claim 21 is amended. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, and 8-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Jayatilleka et al. (US 2016/0356959 A1, herein “Jayatilleka”). Claim 1, Jayatilleka discloses a photonic system (Fig. 10) comprising: a waveguide (150); a micro ring modulator (100) spaced from the waveguide (150), wherein the MRM has a first width in a radial direction of the MRM (middle portion 120, 121, 123 forms the ring resonator waveguide); a heater configured to increase a temperature of the MRM in response to the heater receiving a first voltage (in-resonator photoconductive heater, IRPH, Para [0010] and [0055]), wherein the heater has a second width in the radial direction and the second width is greater than the first width (“the ring includes an outer portion which includes the portions 110, 111…and an inner portion 130 and the n doping makes the ring acts as an IRPH” Para [0051]. “Outer portions 110, 111 and inner portion 130 are doped using a second doping level.” “And outer portion 110 is connected to metal contact via 171 which connects with metal strip 145 of Fig. 1. Inner portion 130 is connected to metal contact via 172.” Para [0053]); Thus, the examiner considers the IRPH has a width spanning from the inner radius of 130 to the outer radius of 110 or 111, which is wider than the radius of middle portion 120, 121, 123; and a cooling element configured to decrease a temperature of the MRM in response to the cooling element receiving a second voltage (thermoelectric cooler (TEC) and thermistor, Para [0068], Jayatilleka discloses a chip temperature control pedestal comprising the TEC and thermistor “to monitor and control the chip temperature” which implies a feedback voltage signal from the thermistor to the TEC). PNG media_image1.png 436 669 media_image1.png Greyscale Claim 2. Jayatilleka discloses controller, wherein the controller (source measure unit 840; Para [0068] and control pedestal 890) is configured to: generate a first signal (Vheater) for supplying the first voltage to the heater (IRPH), and generate a second signal (via thermistor and chip temperature control pedestal) for supplying the second voltage to the cooling element (TEC). Claim 8. Jayatilleka discloses the waveguide (150) is a curved waveguide (Fig. 1 and 3). Claim 9. Jayatilleka discloses a second waveguide (160) wherein the MRM (100) is between the waveguide (150) and the second waveguide (Fig. 1). Claim 10. Jayatilleka discloses the MRM (100) is configured to couple (at coupling regions 151) an optical signal out of waveguide (150), and the MRM (100) is configured to couple (at coupling region 161) the optical signal into the second waveguide (160). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka. Claim 3. Jayatilleka discloses the invention of claim 1 and further discloses the cooling element overlaps the MRM in a top view (Fig. 10, dotted rectangular body). However, Jayatilleka does not explicitly disclose the cooling element comprises a cooling conductive element. The examiner takes OFFICE NOTICE that thermoelectric cooler (TEC) comprises a cooling conductive element. TEC is based on the Peltier effect wherein the cooling effect is created by applying electrical current to the terminals of the cooling module and heat is transferred from one semiconductor substrate to the other semiconductor substrate via metal interconnects attached on both semiconductor substrates of the module. Therefore, cooling conductive element is required for the TEC to function properly. Since Jayatilleka shows the chip temperature control pedestal is below the MRM (dotted rectangle in Fig. 10), Jayatilleka discloses the cooling conductive element overlaps the MRM in a top view. Claim 4. Jayatilleka teach the invention of claim 3 and further teaches the heater (IRPH) comprises heater conductive element (140, 145, 171), wherein the heater conductive element overlaps the MRM in the top view (Fig. 2). Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka in view of Anderson et al. (US 7,570,320 B1, herein “Anderson”). Regarding claim 5, Jayatilleka discloses the invention of claim 4, but Jayatilleka does not teach the heater conductive element is between the cooling conductive element and the MRM. Anderson teaches a thermos-optic waveguide (Fig. 2) with cooler (26), heater conductive element (28) and waveguide (clad 14, core 12, clad 16) for controlling the refractive index of the waveguide (Col. 3, lines 6-17). Anderson also teaches the waveguide may be interchangeable with other dielectric material such as silicon nitride (Col. 5, lines 3-13). The waveguide shown in Figs. 1 and 2 are rectangular or can have any other shape such as curved shape or circular (Col. 3, lines 31-37). Furthermore, Anderson teaches the disclosed embodiments may be used in devices such as tunable resonators (Col. 7, lines 59-67). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize the arrangement of the heater conductive element, waveguide, and the cooler would be modifiable to the invention of Jayatilleka as they are from the same field of endeavor solving the same problem. One would be motivated to arrange the cooler, heater conductive element, and waveguide in the same arrangement as taught by Anderson to improve the heating and cooling of the waveguide, thus increasing the modulating response time. Claim 6. Jayatilleka in view of Anderson teach the invention of claim 5, but Jayatilleka in view of Anderson do not explicitly teach the cooling conductive element is between the heater conductive element and the MRM. However, it has been held that a mere rearrangement of element without modification of the operation of the device involves only routine skill in the art. In re Japiske, 86 USPQ 70 (CCPA 1950). The rearrangement in this case does not modify the operation of the device because the heating conductor and cooler modifies the refractive index of the waveguide that modulates the lightwave signal. The benefits of this modification include increasing the thermal energy to the waveguide. Claim 7, Jayatilleka in view of Anderson teach the invention of claim 4, and Jayatilleka further teaches the photonic system comprising a substrate, wherein the MRM is on the first side of the substrate, and the heater conductive element is on a second side of the substrate opposite the first side of the substrate (See cross sectional view in Fig. 2). Claims 21-22, and 24-26 are rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka in view of Gill et al. (US 2016/0266414 A1, herein “Gill”). Claim 21. Jayatilleka discloses a photonic system (Fig. 10) comprising: a waveguide (150); a micro ring modulator (MRR 100) spaced from the waveguide (150); a first doped region having a first dopant type (n-doped in the middle portion shown in Fig. 2); at least one heater configured to increase a temperature of the MRM, wherein the at least one heater overlaps less than an entirety of the MRM (in-resonator photoconductive heater, IRPH, Para [0049], [0055]); and a portion of the MRM (100) exposed by the at least one heater is adjacent to the waveguide (150), each of the at least one heater comprising: a conductive element (141, 142) configured to provide a first voltage to at least one of the first doped region or the second doped region, wherein each of the first doped region and the second doped region is between the conductive element and the MRM (100). However, Jayatilleka do not explicitly teach a second doped region having a second dopant type, wherein the second dopant type is opposite the first dopant type. Gill teaches dual-use electro-optic and thermos-optic modulator implementing via heater having n-doped wing 110a of a p-n junction. A bias voltage (Vheat) between heater groups 204a and 204b will cause current to flow between these two groups, directly heating n-doped wing 110a of junction 110. P-doped wing 110b is heated similarly by establishing a bias voltage (Vheat) between via groups 204c and 204d. Together, this direct heating of p-n junction 110 results in thermo-optic phase shifting of light traveling through waveguide 108 (Para [0036]). Gill teaches the phase shifter as described can be implemented in function class of nanophotonic devices such as ring resonators (Para [0024]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the thermo-optic heaters having n-doped region and p-doped region in ring resonators, as taught by Gill because Gill outlined the benefit of the short RF phase shifter reduces the capacitance in the RC time constant. When combined with a ring resonator, an RF phase shifter can be relatively short for a given modulation depth. This is because light travels around a ring resonator many times, passing through the same RF phase shifter length. Thus, the more time the light spends in the active RF phase shifter region of the resonator during its optical lifetime, the larger the optical-lifetime-limited bandwidth will be (Para [0024], and [0027]). Claim 22. Jayatilleka further discloses a cooling element (TEC) configured to decrease the temperature of the MRM (100). See Fig. 3. Claim 24. Jayatilleka in view of Gill teach at least one heater comprises a plurality of heaters (n-doped wing and p-doped wing). Claim 25. Jayatilleka further discloses the waveguide (150) is a planar waveguide (Figs. 1-3). Claim 26. Jayatilleka discloses the waveguide (150) is a curved waveguide (return path shown in Fig. 3). Claims 27 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka in view of Le Maitre et al. (US 10,871,663 B2, herein “Le Maitre”). Jayatilleka discloses a photonic system comprising a waveguide (150); a micro ring modulator (100) spaced from the waveguide (150); a first doped region having a first dopant type (n-doped in the middle portion shown in Fig. 2), wherein the first doped region contacts the micro ring modulator (100); a second doped region having a second dopant type (n++ doped in the outer portion shown in Fig. 2), wherein the second doped region contacts the micro ring modulator and the first doped region; a plurality of conductive elements collectively electrically connected to each of the plurality of doped regions (141, 142). However, Jayatilleka does not teach a plurality of third doped regions having the first dopant type; a plurality of fourth doped regions having the second dopant type, wherein third doped regions of the plurality of third doped regions are arranged in an alternating fashion with fourth doped regions of the plurality of fourth doped regions in the first direction. Le Maitre teaches a p-n junction dopant arrangement having alternating p-dopant and n-dopant to better control the forward bias and reverse bias through the heating conductive element (Col. 9, lines 29-48). Fig. 5A and 5B shows the alternating features of the third dopant 1037 and fourth dopant 1035 in two different embodiments, perpendicular orientation (Fig. 5A) parallel orientation (Fig. 5B) to substrate 1031. The third and fourth dopant is implemented to form the heater (107) on the resonator of Fig. 4. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize the alternating doping arrangement of Le Maitre would be modifiable to the device of Jayatilleka since Jayatilleka teaches an alternative embodiment for using p-type doping to form the heater sections (Para [0087]). One would be motivated to employ the alternating n-dopant and p-dopant scheme to better control the applied voltage (e.g., forward and reverse bias) through the heat conducting elements. Claim 30. Jayatilleka in view of Le Maitre teach claim 27, Jayatilleka further teaches at least one conductive element of the plurality of conductive element overlaps the MRM (100) and the first doped region (outer portion 111) is between the at least one conductive element (142) and the MRM (100) (See also Fig. 2). Claim 23 is rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka in view of Gill (herein “Jayatilleka / Gill”) as applied to claim 22 above, and further in view of Anderson. Jayatilleka / Gill teach the invention of claim 22, but Jayatilleka / Gill do not teach the at least one heater is between the cooling element and the MRM. Anderson teaches a thermos-optic waveguide (Fig. 2) with cooler (26), heater conductive element (28) and waveguide (clad 14, core 12, clad 16) for controlling the refractive index of the waveguide (Col. 3, lines 6-17). Anderson also teaches the waveguide may be interchangeable with other dielectric material such as silicon nitride (Col. 5, lines 3-13). The waveguide shown in Figs. 1 and 2 are rectangular or can have any other shape such as curved shape or circular (Col. 3, lines 31-37). Furthermore, Anderson teaches the disclosed embodiments may be used in devices such as tunable resonators (Col. 7, lines 59-67). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize the arrangement of the heater conductive element, waveguide, and the cooler would be modifiable to the invention of Jayatilleka / Gill as they are from the same field of endeavor solving the same problem. One would be motivated to arrange the cooler, heater conductive element, and waveguide in the same arrangement as taught by Anderson to improve the heating and cooling of the waveguide, thus increasing the modulating response time. Claims 28-29 are rejected under 35 U.S.C. 103 as being unpatentable over Jayatilleka in view of Le Maitre (herein “Jayatilleka / Le Maitre”) as applied to claim 27 above, and further in view of Ricci et al. (US 2014/0356985 A1, herein “Ricci”). Jayatilleka / Maitre teach the invention of claim 27, but Jayatilleka / Maitre do not explicitly teach the first and second doped region are configured to increase a temperature of the MRM in response to receiving a voltage and the third doped regions and fourth doped regions are configured to decrease a temperature of the MRM in response to receiving a voltage. Ricci teaches alternating p-doped and n-doped semiconductor elements. The alternating doped semiconductor elements are considered as thermoelectric pairs, wherein the p-doped and n-doped element are connected electrically in series and thermally in parallel by junction such that when an electrical current passes through the junction of the thermoelectric pairs, it either cools or heats the junction depending on the direction of the current, thereby forming a hot side and a cool side of the thermoelectric module that can heat or cool respective portion of the substrate (Para [0017]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize the doping scheme of Le Maitre would result in heating zones and cooling zones to better control the temperature changes in the waveguide. One would be motivated to employ the alternating doping arrangement of Le Maitre, as explained by Ricci, such that the temperature change in the waveguide can quicken thus increase the modulator response time. Response to Arguments Applicant's arguments filed December 17, 2025 have been fully considered but they are not persuasive. Applicant’s request for clarification of Le Maitres’ third and fourth dopant portions are clarified in the rejection to claim 27 above. Applicant's arguments filed December 17, 2025 have been fully considered but they are not persuasive. The rejection above has been clarified to address the amended limitations. Applicant’s arguments with respect to claim(s) 21-26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Erin D Chiem whose telephone number is (571)272-3102. The examiner can normally be reached 10 am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A. Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIN D CHIEM/Examiner, Art Unit 2874 /THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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Prosecution Timeline

Apr 02, 2024
Application Filed
Aug 19, 2025
Non-Final Rejection mailed — §102, §103
Dec 17, 2025
Response Filed
Jun 02, 2026
Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
72%
Grant Probability
89%
With Interview (+16.4%)
3y 0m (~9m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 542 resolved cases by this examiner. Grant probability derived from career allowance rate.

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