DETAILED ACTION
Table of Contents
I. Notice of Pre-AIA or AIA Status 3
II. Double Patenting 3
Claims 1-12 and 17-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 and 17-20 of U.S. Patent No. 12,002,678. 4
III. Allowable Subject Matter 5
IV. Pertinent Prior Art 7
Conclusion 8
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I. Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
II. Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-12 and 17-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 and 17-20 of U.S. Patent No. 12,002,678.
Although the claims at issue are not identical, they are not patentably distinct from each other because each of claims 1-20 of the Instant Application is merely broader than claims 1-20, respectively, of the ‘678 patent.
III. Allowable Subject Matter
Claims 13-16 are allowed. In the event Applicant files a terminal disclaimer to overcome the double patenting rejection, claims 1-12 and 17-20 would be allowed.
The following is an examiner’s statement of reasons for allowance:
1. An integrated circuit (IC) structure, comprising:
[1] a gate metal having a longitudinal axis;
[2] a gate contact above the gate metal; and
[3] a region having an unordered lamellar pattern, wherein the region is coplanar with the gate contact.
13. An integrated circuit (IC) structure, comprising:
[1] a first gate contact having a longitudinal axis;
[2] a second gate contact; and
[3] a region having an unordered lamellar pattern, wherein the region is coplanar with the first gate contact or the second gate contact, and
[4] wherein the region is under a guard ring of the IC structure or is at a periphery of a memory array of the IC structure.
17. An integrated circuit (IC) structure, comprising:
[1] a first gate;
[2] a second gate; and
[3] a region having an unordered lamellar pattern, wherein the region is coplanar with or above the first gate or the second gate, and
[4] wherein the region is under a guard ring of the IC structure or is at a periphery of a memory array of the IC structure.
Each of features [1]-[2] of each of independent claims 1, 13, and 17 is well known in the art. For example, US 2015/0332973 (“Zhong”), which may be taken as the closest prior art, discloses first 14, 211 and second 15, 212 gates having aligned longitudinal axes (Zhong: Figs. 4 and 18, respectively; ¶¶ 4, 44) that are separated and electrically isolated by a gate cut 16, 230 (id.). As in the Instant Application, Zhong forms the gate cut 230 between the gates 211 and 212 using patterning by directed self-assembly (DSA) of a block copolymer (Zhong: Figs. 5-20 and associated text, especially ¶¶ 39, 41). However, Zhong removes the block copolymer (Zhong: ¶ 44; Fig. 18). Therefore, Zhong does not disclose feature [6] of claim 1 or feature [4] of each of claims 13 and 17. In addition, Zhong discusses, but does not show, formation of contact plugs to the gates in the dielectric layer 400 formed over the gates (Zhong: Fig. 22; ¶¶ 48-49, 62).
CN 109698238 A (“Han”) discloses a process similar to Zhong, including formation of a gate cut 210 (Han: Figs. 10A-10B) using DSA of a block copolymer 208/209 (Han: Figs. 6A-6B) to pattern a gate line 202 into two electrically isolated gates having aligned longitudinal axes. As in Zhong, Han removes the block copolymer (Han: Figs. 8A-8B).
The prior art does not reasonably teach or suggest --in the context of the claims-- the features:
Claim 1: a region having an unordered lamellar pattern, wherein the region is coplanar with the gate contact
Claim 13: a region having an unordered lamellar pattern, wherein the region is coplanar with the first gate contact or the second gate contact
Claim 17: a region having an unordered lamellar pattern, wherein the region is coplanar with or above the first gate or the second gate
Claims 2-12 are allowed at least for including the features of claim 1 by depending therefrom. Claims 13-15 are allowed at least for including the features of claim 13 by depending therefrom. Claims 18-20 are allowed at least for including the features of claim 17 by depending therefrom.
IV. Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2020/0234735 (“Kasahara”) is cited for disclosing, in Figs. 3-4, contacts CT formed using DSA (Figs. 11A-17B) in areas, e.g., AR-1 and AR-2, wherein the regions between the areas, AR-1 and AR-2, include an unordered lamellar pattern, as best shown in Fig. 4. However, the region having the unordered lamellar pattern is not coplanar with the contacts CT, as shown in Fig. 3. In addition, the contacts are not indicated to be gate contacts.
US 8,753,738 (“Millward”) is cited for teaching a patterning by DSA of a block copolymer, wherein the block copolymer includes regions 36, 36' that are ordered (i.e. within region A) and unordered (outside or region A) because the unordered regions are not sufficiently heated (Millard: Figs. 5A-5C; col. 10, lines 41-61).
Each of the following references is cited for teaching a method of making a contact to a line using DSA of a block copolymer:
(1) US 2019/0363008 (“Gstrein”): Figs. 1A-1F and associated text.
(2) US 2020/0058548 (“Han”): Figs. 1 to 4 and associated text.
(3) WO 2019/190453 (“Blackwell”): Figs. 4A-4F and associated text.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIK KIELIN whose telephone number is (571)272-1693. The examiner can normally be reached Mon-Fri: 10:00 AM-7:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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Signed,
/ERIK KIELIN/
Primary Examiner, Art Unit 2814
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