Prosecution Insights
Last updated: April 19, 2026
Application No. 18/625,877

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Non-Final OA §102§103
Filed
Apr 03, 2024
Examiner
WELLINGTON, ANDREA L
Art Unit
2800
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
57%
Grant Probability
Moderate
1-2
OA Rounds
2y 4m
To Grant
66%
With Interview

Examiner Intelligence

Grants 57% of resolved cases
57%
Career Allow Rate
205 granted / 358 resolved
-10.7% vs TC avg
Moderate +9% lift
Without
With
+9.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
454 currently pending
Career history
812
Total Applications
across all art units

Statute-Specific Performance

§101
2.6%
-37.4% vs TC avg
§103
43.9%
+3.9% vs TC avg
§102
28.8%
-11.2% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 358 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tang US 10,978,349. PNG media_image1.png 508 533 media_image1.png Greyscale PNG media_image2.png 252 430 media_image2.png Greyscale PNG media_image3.png 258 436 media_image3.png Greyscale Tang US 10,978,349 Regarding claim 1, Tang in Figs. 1-19 and 29, col. 5, line 45-col. 16, line 38 discloses a method of making a semiconductor device, comprising: forming a first fin structure, Fig. 3, annotated above, a second fin structure, Fig. 3, annotated above, a third fin structure, Fig. 3, annotated above, a fourth fin structure, Fig. 3, annotated above, a fifth fin structure, Fig. 3, annotated above, and a sixth fin structure over a substrate 200, Fig. 3, annotated above, wherein the first through the sixth fin structures all extend along a first lateral direction, wherein the second fin structure is separated from each of the first and third fin structures with a first distance D1 Fig. 3, annotated above, wherein the fifth fin structure is separated from each of the fourth and sixth fin structures with the first distance D1, Fig. 3, annotated above, and wherein the third fin structure is separated from the fourth fin structure with a second distance D2, Fig. 3, annotated above, greater than the first distance D1; forming one or more gate structures 240, 250, Fig. 3, annotated above, overlaying a respective portion of each of the first through sixth fin structures; forming a first pair of trenches, e.g. first fin portions, a second pair of trenches, e.g. second fin portions, a third pair of trenches, e.g. third fin portions, a fourth pair of trenches, e.g. fourth fin portions, a fifth pair of trenches, e.g. fifth fin portions, and a sixth pair of trenches, e.g. sixth fin portions by removing respective portions of each of the first through sixth fin structures that are not overlaid by the one or more gate structures 240, 250, Fig. 11, annotated above, col. 6, line 45-col. 7, line 5; forming a dielectric passivation layer 361 Fig. 15, annotated above, col. 14, lines 54-62 over the third and fourth pairs of trenches; and growing source/drain structures 391, 392, Figs. 16, annotated above, col. 15, lines 13-29 in the first, second, fifth, and sixth pairs of trenches, respectively. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2 and 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tang US 10,978,349. Regarding claim 2, Tang discloses the method of claim 1 but does not expressly disclose wherein the first distance ranges from about 5 nanometers to about 300 nanometers. Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B). Regarding claim 3, Tang discloses the method of claim 1 but does not expressly disclose wherein the second distance ranges from about 10 nanometers to about 3000 nanometers. Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B). Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tang US 10,978,349 in view of Kim et al. US 2021/0202527. Regarding claim 13, Tang in Figs. 1-19 and 29, col. 5, line 45-col. 16, line 38 discloses a method of making a semiconductor device, comprising: forming a first fin structure, Fig. 3, annotated above, a second fin structure, Fig. 3, annotated above, a third fin structure, Fig. 3, annotated above, a fourth fin structure, Fig. 3, annotated above, a fifth fin structure, Fig. 3, annotated above, and a sixth fin structure over a substrate 200, Fig. 3, annotated above, wherein the first through the sixth fin structures all extend along a first lateral direction, wherein the second fin structure is separated from each of the first and the third fin structures with a first distance D1 Fig. 3, annotated above, along a second lateral direction perpendicular to the first lateral direction Fig. 2, annotated above, the fifth fin structure is separated from each of the fourth and sixth fin structures with the first distance D1, Fig. 3, annotated above, along the second lateral direction Fig. 2, annotated above, and the third fin structure is separated from the fourth fin structure with a second distance D2, Fig. 3, annotated above, greater than the first distance D1 along the second lateral direction, Fig. 2, annotated above; forming first source/drain structures 391 coupled to respective ends of an upper portion of the first fin structure; forming second source/drain structures 391 coupled to respective ends of an upper portion of the second fin structure; forming first dielectric trenches 210, 361 coupled to respective ends of an upper portion of the third fin structure; forming second dielectric trenches 210, 361 coupled to respective ends of an upper portion of the fourth fin structure; forming third source/drain structures 392 coupled to respective ends of an upper portion of the fifth fin structure; and forming fourth source/drain structures 392 coupled to respective ends of an upper portion of the sixth fin structure. Tang does not expressly disclose stack structures. Kim et al. in Figs. 1-19B [0025]-[0095] teaches a method of forming stack structures CH1 {SP1, SP2, SP3} including source/drain structures SD1, SD2 and a division region (dielectric region) DR between third and fourth stack structures to provide a semiconductor device with increased integration and reliability. Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to try the method of Kim et al., as the court has held that choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). Regarding claim 14, Tang in view of Kim et al. teaches the method of claim 13 but does not expressly teach wherein the first distance ranges from about 5 nanometers to about 300 nanometers. Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B). Regarding claim 15, Tang in view of Kim et al. teaches the method of claim 13 but does not expressly teach wherein the second distance ranges from about 10 nanometers to about 3000 nanometers. Notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Applicant has not disclosed that the relative dimensions are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical, and it appears prima facie that the process would possess utility using another dimension. Indeed, it has been held that mere dimensional limitations are prima facie obvious absent a disclosure that the limitations are for a particular unobvious purpose, produce an unexpected result, or are otherwise critical. See, for example, Jn re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976); Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984); In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). See also MPEP 2144.04(1V)(B). Regarding claim 16, Tang in view of Kim et al. teaches the method of claim 13. Kim et al. in Figs. 1-19B [0025]-[0095] teach wherein each of the first through the sixth stack structures includes a plurality of semiconductor layers, CH1 {SP1, SP2, SP3} that are vertically spaced from one another. Regarding claim 17, Tang in view of Kim et al. teaches the method of claim 13. Tang teaches the method of claim 13, further comprising: forming a first gate structure 240, Fig. 11, annotated above, col. 6, line 45-col. 7, line 5 that extends along the second lateral direction and is disposed over the first through the third stack structures; and forming a second gate structure 250, Fig. 11, annotated above, col. 6, line 45-col. 7, line 5 that extends along the second lateral direction and is disposed over the fourth through the sixth stack structures. Regarding claim 18, Tang in view of Kim et al. teaches the method of claim 17. Tang does not expressly teach wherein the second gate structure is formed offset from the first gate structure along the first lateral direction. However, the Applicant has not presented persuasive evidence that the claimed “wherein the second gate structure is formed offset from the first gate structure along the first lateral direction” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the second gate structure is formed offset from the first gate structure along the first lateral direction). Also, the Applicant has not shown that “wherein the second gate structure is formed offset from the first gate structure along the first lateral direction” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. Instead, paragraph [0042] discloses other possible options. Therefore, no rationale given that the invention will not function without the second gate structure is formed offset from the first gate structure along the first lateral direction. Thus, the claimed wherein the second gate structure is formed offset from the first gate structure along the first lateral direction is not critical to the invention. Examiner would like to note that MPEP §2144.04.IV(B) guideline, where change of shape is a Legal Precedent as Source of Supporting Rationale. See In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). In view of the above, as there is no persuasive evidence that the particular configuration of “wherein the second gate structure is formed offset from the first gate structure along the first lateral direction” is significant, the claimed limitation of “wherein the second gate structure is formed offset from the first gate structure along the first lateral direction” is a matter of choice which a person of ordinary skill in the art would have found obvious as per MPEP §2144.04.IV(B) guideline. Therefore, the claimed limitation of “wherein the second gate structure is formed offset from the first gate structure along the first lateral direction” is not patentable over Tang in view of Kim et al. Regarding claim 19, Tang in view of Kim et al. teaches the method of claim 17. Tang does not expressly teach wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction. However, the Applicant has not presented persuasive evidence that the claimed “wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction). Also, the Applicant has not shown that “wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. There is no rationale given that the invention will not function without the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction. Thus, the claimed wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction is not critical to the invention. Examiner would like to note that MPEP §2144.04.IV(B) guideline, where change of shape is a Legal Precedent as Source of Supporting Rationale. See In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). In view of the above, as there is no persuasive evidence that the particular configuration of “wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction” is significant, the claimed limitation of “wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction” is a matter of choice which a person of ordinary skill in the art would have found obvious as per MPEP §2144.04.IV(B) guideline. Therefore, the claimed limitation of “wherein the first gate structure is formed to have a first width along the first lateral direction, wherein the second gate structure is formed to have a second width different from the first width along the first lateral direction” is not patentable over Tang in view of Kim et al. Regarding claim 20, Tang in view of Kim et al. teaches the method of claim 17. Tang does not expressly teach wherein the second gate structure is formed offset from the first gate structure along the first lateral direction. However, the Applicant has not presented persuasive evidence that the claimed “wherein the first gate structure and the second gate structure are integrally formed as a single piece” is for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the first gate structure and the second gate structure are integrally formed as a single piece). Also, the Applicant has not shown that “wherein the first gate structure and the second gate structure are integrally formed as a single piece” produces a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. Instead, paragraph [0042] discloses other possible options. Therefore, no rationale given that the invention will not function without the first gate structure and the second gate structure are integrally formed as a single piece. Thus, the claimed wherein the first gate structure and the second gate structure are integrally formed as a single piece is not critical to the invention. Examiner would like to note that MPEP §2144.04.IV(B) guideline, where change of shape is a Legal Precedent as Source of Supporting Rationale. See In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.). In view of the above, as there is no persuasive evidence that the particular configuration of “wherein the first gate structure and the second gate structure are integrally formed as a single piece” is significant, the claimed limitation of “wherein the first gate structure and the second gate structure are integrally formed as a single piece” is a matter of choice which a person of ordinary skill in the art would have found obvious as per MPEP §2144.04.IV(B) guideline. Therefore, the claimed limitation of “wherein the first gate structure and the second gate structure are integrally formed as a single piece” is not patentable over Tang in view of Kim et al. Allowable Subject Matter Claims 4-12 are allowed over the prior art. The following is a statement of reasons for the indication of allowable subject matter: the prior art neither anticipates nor renders obvious, in the context of the claims: wherein ends of each of the third plurality of semiconductor layers are coupled with a dielectric passivation layer. Although various prior art references disclose several individual limitations in the claims, these references, and their combinations, neither anticipate nor render obvious the above identified limitation(s), as structured and interrelated in the context of the claims. For example, Tang US 10,978,349 and Kim et al. US 2021/0202527 fail to disclose the above noted limitation. Regarding claim 4, Tang US 10,978,349 in Figs. 2, 3 and 29, col. 5, line 50-col. 6, line 20 discloses a method of making a semiconductor device, comprising: forming a first fin structure, Fig. 3, annotated above; forming a second fin structure, Fig. 3, annotated above; forming a third fin structure, Fig. 3, annotated above, wherein the first, the second, and the third fin structures all extend along a first lateral direction Fig. 2, annotated above, and wherein the second fin structure is disposed between the first and third fin structures along a second lateral direction perpendicular to the first lateral direction Fig. 2, annotated above; and forming a first gate structure 240 that extends along the second lateral direction Fig. 2, annotated above, wherein ends of each of the first fin structures are coupled with respective source/drain structures 291 Fig. 16, wherein ends of each of the second fin structures are coupled with respective source/drain structures 291, and wherein ends of each of the third fin structures are coupled with a dielectric passivation layer 361 Fig. 15, annotated above, col. 14, lines 54-62. Tang does not expressly disclose forming a first stack structure including a first plurality of semiconductor layers vertically spaced from one another; forming a second stack structure including a second plurality of semiconductor layers vertically spaced from one another; forming a third stack structure including a third plurality of semiconductor layers vertically spaced from one another, wherein the first, the second, and the third stack structures all extend along a first lateral direction, and wherein the second stack structure is disposed between the first and third stack structures along a second lateral direction perpendicular to the first lateral direction; and forming a first gate structure that extends along the second lateral direction and wraps around each of the first plurality of semiconductor layers, each of the second plurality of semiconductor layers, and each of the third plurality of semiconductor layers, wherein ends of each of the first plurality of semiconductor layers are coupled with respective source/drain structures, wherein ends of each of the second plurality of semiconductor layers are coupled with respective source/drain structures, and wherein ends of each of the third plurality of semiconductor layers are coupled with a dielectric passivation layer. Kim et al. US 2021/0202527 in Figs. 1-19B and [0022]-[0095] teaches a method of manufacturing a semiconductor device that reduces or prevents degradation of the source/drain pattern adjacent to a division region, thereby improving the reliability and electrical characteristics in the semiconductor device [0095]. The method teaches a FET with a division region between active regions of the device, including first, second and third stack structures CH1 with plurality of semiconductor layers SP1,SP2,SP3 vertically spaced from one another, forming a first gate structure GE [0035] that extends along the second lateral direction and wraps around each of the first plurality of semiconductor layers, each of the second plurality of semiconductor layers, and each of the third plurality of semiconductor layers, wherein ends of each of the first plurality of semiconductor layers are coupled with respective source/drain structures [0026]-[0027], wherein ends of each of the second plurality of semiconductor layers are coupled with respective source/drain structures, and wherein ends of each of the third plurality of semiconductor layers are coupled with a gate spacer layer. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SONYA D MCCALL-SHEPARD whose telephone number is (571)272-9801. The examiner can normally be reached M-F: 8:30 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Sonya McCall-Shepard/ Primary Examiner, Art Unit 2898
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Prosecution Timeline

Apr 03, 2024
Application Filed
Feb 06, 2026
Non-Final Rejection — §102, §103 (current)

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