DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 04/28/2026, 02/24/2026, 04/14/2025, 07/15/2024 and 04/03/2024 is/are in compliance with the provisions 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. All obviousness rationales stated below are rationales that would have been obvious prior to the earliest effective filing date of the application.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6, 8-13, 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin Wen-Yu ae al. (CN 201711218871) herein referred to as Lin, using (US 11,296,256) as the English translation, in view of Sato et al. (US 20200243717) herein referred to as Sato, and further in view of Shatalov et al. (US 20160315449) herein referred to as Shatalov, and further in view of Kao et al. (US 20170207243) herein referred to as Kao.
As to claim 1, Lin discloses a light emitting structure, comprising:
a layered stack (Fig. 2, col 2 lines 60-65, Lin) comprising a first set of doped layers (Fig. 2, col 5 lines 24-31, superlattice structure 120, Lin), a second layer (2nd layer is EBL 140, Lin), a light emitting layer (active layer 130, Lin) positioned between the first set of doped layers (120, Lin) and the second layer (140, Lin), and
a first electrical contact to the first set of doped layers wherein: the first set of doped layers (superlattice structure 120, Lin), the second layer EBL 140, Lin), and the light emitting layer (active layer 130, Lin) comprise semiconductor materials
(layer 120 – col 3 lines 55-56 ”The superlattice structure 120 may be made of a nitride-based semiconductor material.”;
layer 140 – col 3 lines 32-35 “The P-type EBL 140 may be made of a nitride-based semiconductor material including Al, and has an energy band gap greater than that of the P-type cladding layer 150”;
layer 130 – col 1 lines 23-24,”A light-emitting diode (LED) device is a solid-state lighting device made of p-type and n-type semiconductor materials” , Lin) ;
the first set of doped layers (Fig. 2, col 3 lines 38-47, superlattice structure 120, Lin), comprises a first sub-layer (first layered element A, Lin) and a second sub-layer (second layered element A, Lin), wherein the first (first layered element A, Lin) or the second sub-layer (second layered element A, Lin) is adjacent to the light emitting layer (140);
the first and second sub-layers comprise a first and second superlattice, respectively (Fig. 2 col 4 lines 31-32, “The first superlattice unit of the superlattice structure 120 may include at least 3 of the first layered elements (A).” , Lin);
the second layer comprises an electron blocking layer (2nd layer is EBL 140, Lin).
Lin does not appear to expressly disclose:
“a first electrical contact to the first set of doped layers”
Sato teaches in [0042]“The first metal film (162) preferably comes into electrical ohmic contact with the semiconductor layer (12)”, as shown in Fig. 1C. Doped layers must have electrical contact in order to link them to external power. This allows the layers to act as switches or amplifiers, where the combined layers control the flow of electricity.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to have a first electrical contact (obvious) to the first set of doped layers in order to facilitate an industrially tested and accepted working semiconductor device.
Lin does not appear to expressly disclose:
“the first electrical contact is coupled to the second sub-layer (second layered element A);
Sato teaches in [0042]“The first metal film (162) preferably comes into electrical ohmic contact with the semiconductor layer (12) as shown in Fig. 1C, coupled to the second sub layer 126. Doped layers must have electrical contact in order to link them to external power. This allows the layers to act as switches or amplifiers, where the combined layers control the flow of electricity.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to couple components in the Lin device such as are coupled in the Sato device. The first electrical contact of Sato (162, Sato) is next to the second sub-layer (126, Sato) and is coupled, so as to allow the layers to act as switches or amplifiers, such that the combined layers control the flow of electricity.
Lin does not appear to expressly disclose:
"the first and second sub-layers are doped n-type”;
Sato teaches a first and second sub-layers are doped n-type. Sato teaches in [0032], a “stacked semiconductor layer (12) which includes a first conductive semiconductor layer (122) and a second conductive semiconductor layer (126)”. “A conductivity type of the first conductive semiconductor layer (122) is one of an n-type and a p-type, and a conductivity type of the second conductive semiconductor layer (126) is the other of an n-type and a p-type wherein the n-type semiconductor layer may be doped with a donor.” A superlattice is a stack of alternating ultra-thin materials. Placing this near or inside a light-emitting layer improves device performance by better balancing electrical currents and enhancing light emission.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to replace and dope the Lin device first and second sub-layers as n-type such as is in the Sato device, so as to fabricate first and second sub-layers comprising first and second superlattices (obvious) near or inside a light-emitting layer. Superlattice layers improve device performance by better balancing electrical currents and enhancing light emission. Also, n-type doping adds extra, free electrons to the layered structure. This injection of negative charges allows for more precise control of the material's conductivity and energy bands.
Lin does not appear to expressly disclose:
“an electrical conductivity of the second sub-layer is higher than an electrical conductivity of the first sub-layer”;
Sato teaches in [0042]“The first metal film (162, Sato) preferably comes into electrical ohmic contact with the semiconductor layer (12, Sato) and preferably comes into contact with the semiconductor layer (12, Sato).” However, Sato does not expressly disclose the second conductive layer (126, Sato) has a higher electricity. Nonetheless, it is well known in the industry that there is a higher electricity conductivity of the layer last doped. i.e. the top layer of a lattice. The relationship between the top layer and its conductivity depends heavily on the specific device and manufacturing process. It is well established in the semiconductor industry that intentionally introducing impurities—doping—into a semiconductor crystal lattice dramatically increases its charge carrier concentration, which in turn significantly raises its electrical conductivity. The Examiner brings the reference Kao as an example of well-known semiconductor doping practices. Kao states “[0045] In further embodiments where more than one additional sub-layers are provided in the BBL, the indium content (or, in some cases, the indium to zinc content ratio) in one of the additional sub-layers closer to the first layer 105-1 should be higher than that in the one further away there-from, for similar reasons as previously discussed.” Likewise, the top layer of the prior art, being doped last, receives more doping as shown in Fig. 1C (layer 126) as the top layer of the doped semiconductor layer (12, Sato).
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention to arrange the second sublayer of the Lin device as is arranged in the Sato device. Since layer (126, Sato) has a higher doping, (obvious) layer (126, Sato) has a higher electrical conductivity than the first sub-layer (122, Sato) as well. Fick's laws of diffusion are the fundamental equations semiconductor manufacturers use to control and predict how impurities (dopants) spread into a semiconductor. By determining where the dopants go, they define the number of charge carriers and ultimately control the electrical conductivity of the material.
The Examiner brings the reference Shatalov as an example of well-known semiconductor doping practices of controlling electrical performance of a device by doping optimization. As disclosed in Shatalov “[0080] In addition to optimizing optical properties of the proposed superlattices for the wave-guiding layers 28C, 28D, doping of the semiconductor layers within a superlattice can be tailored to provide the improved electrical conductivity.”
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention that an electrical conductivity of the second sub-layer is higher than an electrical conductivity of the first sub-layer in the Sato device, so as to optimize the optical properties of the proposed superlattices in claim 1.
Lin does not appear to expressly disclose:
“the light emitting layer comprises a third superlattice;
Sato teaches the light emitting layer comprises a third superlattice. Sato teaches in [0032] “ the light-emission layer (124), and the second conductive semiconductor layer 126 may each be a monolayer, a multilayer made up of two or more layers, or a stack structure of superlattices (obvious) or the like.”
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to replace the light emitting layer (130) of Lin with the light emitting layer (124) of Sato, so as to fabricate a light emitting layer comprising a super lattice. A superlattice is a stack of alternating ultra-thin materials. Placing this inside a light-emitting layer improves device performance by better balancing electrical currents and enhancing light emission to produce an industrially tested and accepted device.
As to claim 2, the combined Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
the first sub-layer (Fig. 1C, 122 Sato) is adjacent to the light emitting layer (Fig. 1C, 124).
As to claim 3, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
the second sub-layer (Fig. 1C, 126, Sato) is adjacent to the light emitting layer (Fig. 1C, 124).
As to claim 4, the combined Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein:
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“light with a wavelength shorter than 300 nm that is emitted from the light emitting layer passes through the first set of doped layers before being emitted from the light emitting structure;” and
However, all wavelengths of light, whether shorter than 300 nm or longer than 300 nm, pass through the light emitting device where light first passes through the first set of doped layers, before being emitted from the light emitting structure since the layer structure of the Lin/Sato/Shatalov/Kao device is in the same order as the Applicant’s device.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, light with a wavelength shorter than 300 nm that is emitted from the light emitting layer (124 Sato) passes (obvious) through the first set of doped layers before being emitted from the light emitting structure since all wavelengths of light pass through the device through the first set of doped layers first.
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the second sub-layer absorbs from 10% to 60% of the light emitted from the light emitting layer that reaches the second sub-layer.”
However, the second sub-layer absorbency of 10% to 60% of the light emitted from the light emitting layer is dependent on the material characteristics. The Applicant’s Specification states that the second sub-layer “[0048] can contain SPSLs with tri-layered unit cells comprising the triple layers of AlN/Al.sub.xGa.sub.1-xN/GaN or AlN/Al.sub.xGa.sub.1-xN/Al.sub.yIn.sub.zGa.sub.1-y-zN”.
Since the second sublayer of the Lin/Sato/Shatalov/Kao device contains the same materials (Sato [0032] (126) can also be a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1)”) then their material characteristics/opacity (obvious) are the same.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention that when a material is the same, the material characteristics such as sub-layer absorbency of 10% to 60% is also the same.
As to claim 5, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the second superlattice comprises well layers with materials with lower bandgaps than well layers of the first superlattice.”
However, the second superlattice well layer materials having lower bandgaps than well layers of the first superlattice is based on the material itself and the dopant. The Applicant’s claim 10 states that the “first, second, and third superlattices each comprise sets of GaN well layers and AlN barrier layers”
Since the second superlattice and first superlattice of the Lin/Sato/Shatalov/Kao device contains the same materials of the Applicants first and second superlattices (Sato [0032] (126) can also be a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1)”) then their material characteristics/bandgaps (obvious) are the same.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, a superlattice with smaller well bandgaps creates a material with a lower overall or "tunable" energy bandgap. This design is primarily used to detect longer-wavelength infrared light, absorb lower-energy photons in solar cells, and improve the speed and efficiency of electronic devices. The same materials and same dopants in the Lin/Sato/Shatalov/Kao device produce the same second superlattice well layers with materials of lower bandgaps than well layers of the first superlattice.
As to claim 6, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“each of the first and second sub-layers comprises an effective bandgap that is constant throughout the sub-layer.”
However, the first and second sub-layers of the Lin/Sato/Shatalov/Kao device are the same materials of the Applicant’s device. The Applicant’s Specification [0048] states that the first and second sub-layers “can contain SPSLs with tri-layered unit cells comprising the triple layers of AlN/Al.sub.xGa.sub.1-xN/GaN or AlN/Al.sub.xGa.sub.1-xN/Al.sub.yIn.sub.zGa.sub.1-y-zN”.
Since the first and second sublayer of the Lin/Sato/Shatalov/Kao device contains the same materials ([0032, Sato] “ can also be a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1)”) then their material characteristics/effective bandgap are the same. A superlattice is a repeating stack of very thin layers of different materials. You use a superlattice with constant bandgaps to trap particles easily, build faster switches, or control light. It allows scientists to perfectly tune how electrons move without changing the base material.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention that when a material is the same, the material characteristics and effective bandgap (obvious) is the same.
As to claim 8, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“each of the first and second sub-layers has a thickness from about 10 nm to 3000 nm”
Sato teaches ([0032] “A thickness of each of the first conductive semiconductor layer 122, the light-emission layer 124, and the second conductive semiconductor layer 126 as well as a thickness of the entire semiconductor layer 12 are not particularly limited and can be appropriately adjusted in accordance with intended characteristics, materials used, and the like.” Sato )
However, the Applicant has NOT shown that thickness from about 10 nm to 3000 nm is a critical (range/limit/requirement) and that it would not have been found through routine experimentation. Furthermore, the Applicant has not shown that a thickness “from about 10 nm to 3000 nm” is somehow unique, novel or cutting edge in the fabrication method and use of the disclosed device.
Therefore, It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention to make the first and second sub layers of the Lin/Sato/Shatalov/Kao device, a thickness from about 10 nm to 3000 nm since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re AIler, 105 USPQ 233.
As to claim 9, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the first sub-layer comprises a thickness greater than 100 nm.”
Sato teaches ([0032] “A thickness of each of the first conductive semiconductor layer 122, the light-emission layer 124, and the second conductive semiconductor layer 126 as well as a thickness of the entire semiconductor layer 12 are not particularly limited and can be appropriately adjusted in accordance with intended characteristics, materials used, and the like.” Sato)
However, the Applicant has NOT shown that thickness (obvious) greater than 100 nm is a critical (range/limit/requirement) and that it would not have been found through routine experimentation. Furthermore, the Applicant has not shown that a thickness ”greater than 100 nm” is somehow unique, novel or cutting edge in the fabrication method and use of the disclosed device.
Therefore, It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention to make the first sub layer of the Lin/Sato/Shatalov/Kao a thickness greater than 100 nm since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re AIler, 105 USPQ 233.
As to claim 10, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
the first, second, and third superlattices each comprise sets of GaN well layers and AlN barrier layers. ([0032, Sato] “Types and materials of the first conductive semiconductor layer 122, the light-emission layer 124, and the second conductive semiconductor layer 126 are not particularly limited. For example, a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1) is suitably used.” Sato)
As to claim 11, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
at least one of the first, second, and third superlattices comprise AlxGa1-xN, where 0≤x≤1
(Lin, col 3 lines 58-65 “each of the first layered elements (A), the first sub-layer 121 may be made of an indium gallium nitride (InGaN)-based material represented by a formula of In.sub.xGa.sub.(1-x)N (where x is within a range of 0 to 0.2), the second-sublayer 122 may be made of an AlGaN-based material represented by a formula of Al.sub.yGa.sub.(1−y)N (where y is within a range of 0 to 0.3), and the third sub-layer 123 may be made of an aluminum nitride (AlN)-based material.”)
As to claim 12, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
at least one of the first, second, and third superlattices comprise InAlGaN. (Lin, col 3 lines 58-65 “each of the first layered elements (A), the first sub-layer 121 may be made of an indium gallium nitride (InGaN)-based material represented by a formula of In.sub.xGa.sub.(1-x)N (where x is within a range of 0 to 0.2), the second-sublayer 122 may be made of an AlGaN-based material represented by a formula of Al.sub.yGa.sub.(1−y)N (where y is within a range of 0 to 0.3), and the third sub-layer 123 may be made of an aluminum nitride (AlN)-based material.”)
As to claim 13, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the second layer comprises a thickness from 5 nm to 50 nm”
Lin/Sato/Shatalov/Kao does not teach the second layer (Lin, 140) comprises a thickness (obvious) from 5 nm to 50 nm”. However, the Applicant has NOT shown that thickness from 5 nm to 50 nm is a critical (range/limit/requirement) and that it would not have been found through routine experimentation. (obvious). An electron blocking layer (EBL) needs a very specific thickness because it forces a trade-off between two opposing forces: trapping electrons and letting holes through. Furthermore, The Applicant has not shown that a ”thickness from 5 nm to 50 nm” is somehow unique, novel or cutting edge in the fabrication method and use of the disclosed device.
Therefore, It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention to make the second layer of the Lin/Sato/Shatalov/Kao device, a thickness from 5 nm to 50 nm since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re AIler, 105 USPQ 233.
As to claim 17, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses further comprising
a substrate coupled to the first set of doped layers, wherein the substrate comprises sapphire, SiC, AlN, GaN, silicon, or diamond. (Lin, col 3 lines 10-13,” For example, the N-type cladding layer 110 and the P-type cladding layer 150 may be made of an aluminum gallium nitride (AlGaN)-based material or a gallium nitride (GaN)-based material”.)
As to claim 18, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses further comprising:
the first electrical contact comprises Ti, Al, Ta and/or Ni. ([0043, Sato] Various metal materials such as aluminum (Al) and silver (Ag) can be used as the material of the first metal film (162)
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“a second electrical contact coupled (obvious) to the second layer (Lin, 140), wherein the second electrical contact comprises Ti, Al, Ta and/or Ni”, and wherein
Sato teaches in [0043]“The first metal film (162) is made of “Various metal materials such as aluminum (Al) and silver (Ag) can be used as the material of the first metal film (162)” and that the film comes into electrical ohmic contact with the semiconductor layer (12) as shown in Fig. 1C, being coupled to the second sub layer (126). Doped layers (obvious) must have electrical contact in order to link them to external power. This allows the layers to act as switches or amplifiers, where the combined layers control the flow of electricity.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, that a second electrical contact is also coupled to the second layer (Lin 140) components in the Lin device such as are coupled in the Sato device. Electrical contacts such as the contacts in the Sato (162) device, so as to allow the layers to act as switches or amplifiers, such that the combined layers control the flow of electricity.
As to claim 19, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the electrical conductivity of the second sub-layer is higher than the electrical conductivity of the first sub-layer due to polarization doping.”
However, the first and second sub-layers of the Lin/Sato/Shatalov/Kao device are the same materials of the Applicant’s device. The Applicant’s Specification states that the first and second sub-layers “[0048] can contain SPSLs with tri-layered unit cells comprising the triple layers of AlN/Al.sub.xGa.sub.1-xN/GaN or AlN/Al.sub.xGa.sub.1-xN/Al.sub.yIn.sub.zGa.sub.1-y-zN”.
Since the first and second sublayer of the Lin/Sato device contains the same materials ([0032, Sato] “ can also be a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1)”) then their material characteristics/electrical conductivity (obvious) are the same.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention that when a material is the same, the material characteristics and electrical conductivity is the same.
As to claim 20, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 19, as discussed above, and further discloses wherein
The combined Lin/Sato/Shatalov/Kao device does not explicitly teach:
“the electrical conductivity of the second sub-layer is higher than the electrical conductivity of the first sub-layer due to reasons unrelated to a doping density from an extrinsic dopant.”
However, the first and second sub-layers of the Lin/Sato/Shatalov/Kao device are the same materials of the Applicant’s device. The Applicant’s Specification states that the first and second sub-layers “[0048] can contain SPSLs with tri-layered unit cells comprising the triple layers of AlN/Al.sub.xGa.sub.1-xN/GaN or AlN/Al.sub.xGa.sub.1-xN/Al.sub.yIn.sub.zGa.sub.1-y-zN”.
Since the first and second sublayer of the Lin/Sato/Shatalov/Kao device contains the same materials ([0032, Sato] “ can also be a gallium nitride-based semiconductor material such as In.sub.XAl.sub.YGa.sub.1−X−YN (0≤X, 0≤Y, X+Y≤1)”) then their material characteristics/electrical conductivity (obvious) are the same.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention that when a material is the same, the material characteristics and electrical conductivity is the same.
Claim(s) 7, 14 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin Wen-Yu ae al. (CN 201711218871) herein referred to as Lin, using US 11,296,256 as the English translation, in view of Sato et al. (US 20200243717) herein referred to as Sato, and further in view of Shatalov et al. (US 20160315449) herein referred to as Shatalov, and further in view of Kao et al. (US 20170207243) herein referred to as Kao, and further in view of Lachab, Mohamed (US 20190103509) herein referred to as Lachab.
As to claim 7, Lin/Sato/Shatalov/Kao device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
“each of the first and second sub-layers
Lin/Sato/Shatalov/Kao does not expressly teach each of the first and second sub-layers comprises an effective bandgap that varies throughout the sub-layer.
Lachab teaches first and second sub-layers comprising an effective bandgap that varies (obvious) throughout the sub-layer. The first and second sub layers are a part of a superlattice structure. (obvious) Using a superlattice with varying bandgaps—often called bandgap engineering—allows scientists to create custom materials that perform better than natural ones. By stacking ultra-thin alternating layers of different semiconductors, engineers can perfectly control how electrons, light, and heat move through the device.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to have first and second sub-layers comprising an effective bandgap that varies throughout the sub-layer to improve device performance by better balancing electrical currents and enhancing light emission,
As to claim 14, the Lin/Sato/Shatalov/Kao combination device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
the electron blocking layer is a p-type (col 6 line 20, “P-type electron-blocking layer 140”).
Lin/Sato/Shatalov/Kao does not teach the electron blocking layer comprises a fourth superlattice that is a p-type superlattice.
Lachub teaches in [0007] “An asymmetric p-type superlattice layer is located adjacent to the electron blocking layer, wherein the p-type superlattice includes at least one superlattice period comprising a set of wells and a set of barriers.” The examiner has interpreted the electron blocking layer of the Lachub device as comprising both the electron blocking layer and the adjacent superlattice. A superlattice is a repeating stack of very thin layers of different materials. Use of a superlattice with constant bandgaps traps particles easily, build faster switches, or control light. It lets scientists perfectly tune how electrons move without changing the base material.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to replace the electron blocking layer (140, Lin) of the Lin/Sato/Shatalov/Kao device with an electron blocking layer of the Lachub device, which includes at least one superlattice, so as to fabricate a light emitting layer blocking layer comprising a super lattice (obvious). A superlattice is a stack of alternating ultra-thin materials. Placing this inside a light-emitting layer improves device performance by better balancing electrical currents and enhancing light emission to produce an industrially tested and accepted device.
As to claim 16, Lin/Sato/Shatalov/Kao/Lachub combination device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
the electron blocking layer comprises a chirped superlattice comprising wells and barriers, wherein thicknesses of the wells, the barriers, or both the wells and the barriers, vary throughout the electron blocking layer. ([0009] Lachub “wherein the electron blocking layer includes a region of graded composition; a p-type superlattice layer located adjacent to the electron blocking layer…”)
([0009] Lachub “the p-type superlattice layer includes at least one superlattice period comprising a plurality of wells and a plurality of barriers, and wherein a thickness of at least one of: each well in the plurality of wells or each barrier in the plurality of barriers varies along a length of the p-type superlattice layer)”
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin Wen-Yu ae al. (CN 201711218871) herein referred to as Lin, using US 11,296,256 as the English translation, in view of Sato et al. (US 20200243717) herein referred to as Sato, and further in view of Shatalov et al. (US 20160315449) herein referred to as Shatalov ,and further in view of Kao et al. (US 20170207243) herein referred to as Kao, and further in view of Bhusal et al. (US 10141477) herein referred to as Bhusal.
As to claim 15, the Lin/Sato/Shatalov/Kao combination device teaches the light emitting structure of claim 1, as discussed above, and further discloses wherein
“the electron blocking layer”.
Lin/Sato/Shatalov/Kao does not teach the electron blocking layer comprises a single layer with a conduction band offset configured to confine electrons inside the light emitting layer”
However, Bhusal does teach in col 7 lines 47-56, “an electron blocking layer (440a) and the conduction band offset. As illustrated, the increase in the X-band energy of the strained electron blocking layer (440a) and the strained barrier layer structures (330a-1) increases their respective conduction band offsets , thereby enhancing their capability to prevent electrons from escaping.” An electron blocking layer (EBL) with a single-layer conduction band offset is primarily used in light-emitting devices to act as an energy wall. It prevents negative particles from escaping the active area. This forces the particles to stay inside the light-producing zone.
It would have been obvious to one who is skilled in the art, before the effective filing date of the claimed invention, to replace (obvious) the electron blocking layer (140) of /Sato/Shatalov/Kao/Lachub with electron blocking layer of Bhusal (440a), so as to fabricate a more efficient light emitting device.
Additionally, claim 15 recites the performance properties of the device (i.e. “configured to confine electrons inside the light emitting layer”). This functional limitation does not distinguish the claimed device over the prior art, since it appears that this limitation can be performed by the prior art structure of the conduction band offset. While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429,1431-32 (Fed. Cir. 1997) See MPEP 21
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAWN SHAW MUSLIM whose telephone number is (571)270-0071. The examiner can normally be reached Mon-Fri 7 am - 4 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached on (571) 272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/SHAWN SHAW MUSLIM/Examiner, Art Unit 2897
Prosecution Insights