Prosecution Insights
Last updated: April 19, 2026
Application No. 18/626,349

NONVOLATILE MEMORY DEVICE INCLUDING MULTIPLE PAGE BUFFERS AND OPERATING METHOD THEREOF

Non-Final OA §103§112
Filed
Apr 04, 2024
Examiner
BEGUM, SULTANA
Art Unit
2824
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
SK Hynix Inc.
OA Round
1 (Non-Final)
93%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
To Grant
94%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allow Rate
486 granted / 522 resolved
+25.1% vs TC avg
Minimal +0% lift
Without
With
+0.4%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
32 currently pending
Career history
554
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
16.9%
-23.1% vs TC avg
§112
17.6%
-22.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 522 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status of claim(s) to be treated in this office action: a. Independent: 1 and 9 b. Pending: 1-5 and 9-14 Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification. Election/Restrictions Applicant's election with traverse of claims 1-5 and 9-14 in the reply filed on 1/2/2026 is acknowledged. The traversal is on the ground(s) that both groups fall within a substantially similar technical area and examination of all claims can be made without serious burden. This is not found persuasive because Group II recites two different operation modes which is not required by Group I. The requirement is still deemed proper and is therefore made FINAL. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) is submitted on 4/4/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Objections Claims 1 and 9 are objected to because of the following informalities: “sequentially enable L groups among the P groups”. Instead, it should recite “sequentially enable L groups of page buffers among the P groups of page buffers”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. The term “operation mode” in independent claims 1 and 9 is a relative term which renders the claim indefinite. The term “operation mode” is not defined by the claim, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. Clarification is required regarding whether it refers to read, program, erasure, refresh etc. All the dependent claims 2-5 and 10-14 carry the same deficit and they didn’t elaborate the term either, and henceforth rejected. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 20220366993) in view of Yang (US 20210050051). Regarding independent claim 1, Kim discloses a memory device (Fig. 6) comprising: a memory cell array including multiple memory cells (Fig. 6 and [0066] describes memory cell array 100); multiple page buffers connected to the memory cells (Fig. 6 and [0075] describes page buffer circuit 210 may include a plurality of page buffers PB and coupled to the memory cell array 100); and an enable control circuit configured to divide the page buffers into P groups (Fig. 6 and [0070] describes control circuit 220 which generates a page buffer control signal PBCTL for controlling the page buffer circuit 210), sequentially enable L groups among the P groups during an entry interval of an operation mode (Claim 9 recites activating shield signal during a first time interval sequentially in each of the plurality of page buffers), and adjust a length of the entry interval of the operation mode based on a value of L (Fig. 12 and [0112] describes adjusting at least one of the first time interval and the activating level of the shield signal SHLD for page buffers), wherein P is a natural number greater than or equal to 2, and L is a natural number greater than or equal to 1 and less than or equal to P (Fig. 6 shows P is more than 2). Also, Yang teaches adjust a length of the entry interval of the operation mode based on a value of L ([0155] describes adjust the interval between time points at which a plurality of page buffer control signals that are applied to the respective page buffer groups PBG1 to PBG4 are activated depending on the progress of the program operation. Claims 5, 6, 7, 9, 10 and 11 recites adjusting interval of activating page buffers). It would have been obvious to one of ordinary skill in the art before the earliest effective filing date to apply the teachings of Yang to Kim in order to provide with method that includes determining an interval between initiation time points of bit line precharge operations on a plurality of bit line groups coupled to the plurality of memory cells depending on a progress of the program operation, and performing the bit line precharge operations depending on the determined interval between the initiation time points as taught by Yang ([0007]). Independent claim 9 recites the exact same limitations recited by independent device claim 1 in method format and henceforth rejected the same way. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SULTANA BEGUM whose telephone number is (571)431-0691. The examiner can normally be reached M-F 8 am - 5 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Richard Elms can be reached at 571272 1869. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SULTANA BEGUM/Primary Examiner, Art Unit 2824 1/21/2026
Read full office action

Prosecution Timeline

Apr 04, 2024
Application Filed
Jan 21, 2026
Non-Final Rejection — §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603121
MEMORY REFRESH WITH NEGATIVE VOLTAGE GENERATOR
2y 5m to grant Granted Apr 14, 2026
Patent 12597457
INITIAL SETTING DEVICE OF SEMICONDUCTOR MEMORY TO DETERMINE VALID SETTING
2y 5m to grant Granted Apr 07, 2026
Patent 12592276
SEMICONDUCTOR MEMORY DEVICE WITH SENSE AMPLIFIER THAT OPERATES FOR TWO DIFFERENT VOLTAGE RANGE AND WRITING METHOD THEREOF
2y 5m to grant Granted Mar 31, 2026
Patent 12592272
MEMORY DEVICE HAVING NON-UNIFORM REFRESH
2y 5m to grant Granted Mar 31, 2026
Patent 12580008
POWER GATING CIRCUIT WITH MEMORY PRECHARGE SUPPORT
2y 5m to grant Granted Mar 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
93%
Grant Probability
94%
With Interview (+0.4%)
1y 11m
Median Time to Grant
Low
PTA Risk
Based on 522 resolved cases by this examiner. Grant probability derived from career allow rate.

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