Prosecution Insights
Last updated: July 17, 2026
Application No. 18/626,388

SEMICONDUCTOR PACKAGE DEVICE

Non-Final OA §102
Filed
Apr 04, 2024
Priority
May 31, 2021 — RE 10-2021-0069900 +1 more
Examiner
HA, NATHAN W
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1055 granted / 1157 resolved
+23.2% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
12 currently pending
Career history
1167
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
69.0%
+29.0% vs TC avg
§102
11.1%
-28.9% vs TC avg
§112
1.7%
-38.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1157 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin (US 2021/0028097.) In regard to claim 1, in fig. 5, Lin discloses a method of fabricating semiconductor package device, comprising: providing a semiconductor chip, or die, 102 (para [0015]) including a first chip pad and a second chip pad 114 (para [0015]); forming a first redistribution pattern (not numbered) in direct contact with the first chip pad; and forming a second redistribution pattern 406 (the element formed between the first redistribution element) in direct contact with the second chip pad; wherein the first redistribution pattern includes a first via part, wherein the second redistribution pattern includes a second via part (para [0016]), and wherein a length of the second via part is greater than a length of the first via part. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-4, 7-9, 16, and 18 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by HUANG (US 2022/0020674, hereinafter, Huang.) In regard to claims 1 and 7, in fig. 7, for example, Huang discloses a method of fabricating semiconductor package device 4, comprising: providing a semiconductor chip 42 including a first chip pad and a second chip pad 44 (para [0056]); forming a first redistribution pattern 246 (para [0060]) in direct contact with the first chip pad; and forming a second redistribution pattern 145 in direct contact with the second chip pad; wherein the first redistribution pattern includes a first via part, wherein the second redistribution pattern includes a second via part, and wherein a length of the second via part is greater than a length of the first via part. Regarding claim 7, Huang further shows the etching and forming the redistribution layer by patterning the dielectric layers. Figs. 11-21. Regarding claims 2 and 16, wherein the first redistribution pattern further includes a first via pad part that vertically overlaps the first via part, wherein the second redistribution pattern further includes a second via pad part that vertically overlaps the second via part, and wherein the first via pad part and the second via pad part are located at different levels. Fig. 7. Regarding claim 3, Lin further comprising forming a third redistribution pattern on the first redistribution pattern, wherein the third redistribution pattern is in direct contact with the first redistribution pattern, wherein the third redistribution pattern includes a third via part, and wherein the length of the second via part is greater than a length of the third via part. Fig. 7. Regarding claim 4, wherein the second redistribution pattern further includes a second via pad part that vertically overlaps the second via part, wherein the third redistribution pattern further includes a third via pad part that vertically overlaps the third via part, and wherein the second via pad part and the third via pad part are located at different levels. Fig. 7. Regarding claim 8, wherein the first dielectric layer and the second dielectric layer include at least one selected from photosensitive polyimide (para [0055].) Regarding claim 9, each of the first redistribution pattern and the second redistribution pattern includes a seed/barrier pattern and a metal pattern on the seed/barrier pattern, wherein the seed/barrier pattern includes copper/titanium, and wherein the metal pattern includes copper. Fig. 7 and para [0051]. Regarding claim 18, wherein patterning of the first dielectric layer and the second dielectric layer includes an exposure process, a development process, and a curing process (para [0055].) Allowable Subject Matter Claims 5-6, 10-15, and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art does not show wherein the first chip pad has a first diameter, wherein the second chip pad has a second diameter, and the second diameter is greater than the first diameter. And further comprising forming a third redistribution pattern in direct contact with the first redistribution pattern, wherein forming the second redistribution pattern and forming the third redistribution pattern are performed simultaneously. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATHAN W HA whose telephone number is (571)272-1707. The examiner can normally be reached M-T: 8:00AM-6:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, WAEL FAHMY can be reached at (571)-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATHAN W HA/Primary Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Apr 04, 2024
Application Filed
May 15, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+7.8%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1157 resolved cases by this examiner. Grant probability derived from career allowance rate.

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