Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are presented for examination.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Claims 1, 8 and 15 as drafted, recite a process that, under its broadest reasonable interpretation, covers steps that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “identify one or more functions to compile based, at least in part, on a number of times the one or more functions were previously compiled” as drafted, is a process that, under its broadest reasonable interpretation, recite the abstract idea of mental processes. These limitations encompass a human mind carrying out these functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas.
This judicial exception is not integrated into a practical application. The claims recites the following additional elements “a processor comprising: one or more circuits to perform a compiler,” “A system, comprising: one or more processors to perform a compiler,” which are merely instructions to implement an abstract idea on a computer, or merely using a generic computer or computer components as a tool to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea, thus fail to integrate the abstract idea into a practical application.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are generic computer components and instructions used as the tools to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims cannot provide an inventive concept. Thus, the claims are not patent eligible.
Claims 2-4, 9-11 and 16-18 further define the one or more function as part of the “identify” function set forth in the claims from which they depend, thus, are also considered to recite a mental process that can be reasonably carried out through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper.
Claims 5, 12 and 19 as drafted, recite a process that, under its broadest reasonable interpretation, covers steps that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “record the number of times the one or more functions were previously compiled” as drafted, is a process that, under its broadest reasonable interpretation, recite the abstract idea of mental processes. These limitations encompass a human mind carrying out these functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas.
This judicial exception is not integrated into a practical application. The claims recites the following additional elements “wherein the one or more circuits are to cause the compiler,” which are merely instructions to implement an abstract idea on a computer, or merely using a generic computer or computer components as a tool to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea, thus fail to integrate the abstract idea into a practical application.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are generic computer components and instructions used as the tools to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims cannot provide an inventive concept. Thus, the claims are not patent eligible.
Claims 6, 13 and 20 as drafted, recite a process that, under its broadest reasonable interpretation, covers steps that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “compile the one or more functions based on the number of times the one or more functions were previously compiled exceeding a threshold” as drafted, is a process that, under its broadest reasonable interpretation, recite the abstract idea of mental processes. These limitations encompass a human mind carrying out these functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas.
This judicial exception is not integrated into a practical application. The claims recites the following additional elements “wherein the one or more circuits are to cause the compiler,” which are merely instructions to implement an abstract idea on a computer, or merely using a generic computer or computer components as a tool to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea, thus fail to integrate the abstract idea into a practical application.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are generic computer components and instructions used as the tools to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims cannot provide an inventive concept. Thus, the claims are not patent eligible.
Claims 7, and 14 as drafted, recite a process that, under its broadest reasonable interpretation, covers steps that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “identify the one or more functions to compile based on an amount of time used to compile the one or more functions” as drafted, is a process that, under its broadest reasonable interpretation, recite the abstract idea of mental processes. These limitations encompass a human mind carrying out these functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas.
This judicial exception is not integrated into a practical application. The claims recites the following additional elements “wherein the one or more circuits are to cause the compiler,” which are merely instructions to implement an abstract idea on a computer, or merely using a generic computer or computer components as a tool to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims do not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea, thus fail to integrate the abstract idea into a practical application.
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are generic computer components and instructions used as the tools to perform the abstract idea. See MPEP 2106.05(f). Accordingly, the additional elements recited in the claims cannot provide an inventive concept. Thus, the claims are not patent eligible.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation "The system of claim 8, wherein the one or more circuits are to cause the compiler to further identify the one or more functions to compile based on an amount of time used to compile the one or more functions."
The term "the one or more circuits" lacks antecedent basis because Claim 8 (from which it depends) introduces "one or more processors," not "one or more circuits." There is no prior introduction of "circuits" in Claim 8 or its preamble. This renders the scope of Claim 14 indefinite, as it is unclear what "the one or more circuits" refers to.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-6,8-13,15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Freyburger (US 6405368B1) in view of Thomas (US 8631219B2).
Regarding Claim 1, Freyburger (US 6405368B1) teaches
A processor comprising: one or more circuits to perform a compiler to identify one or more functions to compile (Col 1: ln 57-67, " This invention provides a simple method of implementing the separate compilation of templates by creating an executable program from source programs having templates comprising the steps of: providing a first source file having a template definition; providing a second source file having a template instantiation; compiling the first source file and the second source file into first and second object files, the first object file comprising a template definition; and linking the first and second object files into an executable program.") Examiner Comments: Freyburger describes a compiler identifying template functions for separate compilation to generate object files, which directly teaches identifying functions to compile as part of the compilation process.
Freyburger did not specifically teach based, at least in part, on a number of times the one or more functions were previously compiled.
However, Thomas (US 8631219B2) teaches
based, at least in part, on a number of times the one or more functions were previously compiled (Col 28: ln 60-67, "if fragments of the code of the method func are executed sufficient times by the interpreter such that the fragments are considered to be dominant path fragments of the code, they are queued for compilation.") Examiner Comments: Thomas uses counters to track execution frequency before queuing for compilation, which maps to deciding compilation based on prior occurrences analogous to previous compilations in dynamic contexts.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Freyburger’s teaching with Thomas’s in order to reduce performance impact by compiling only frequently used code, as Thomas teaches "reduce the performance impact of online compilation" (Col 4: ln 60-67), thereby enhancing Freyburger's template compilation efficiency by avoiding unnecessary compilations of infrequently instantiated templates.
Regarding Claim 2, Freyburger, and Thomas teach
The processor of Claim 1. Freyburger teaches wherein the one or more functions are templatized functions (Col 1: ln 57-67, " This invention provides a simple method of implementing the separate compilation of templates by creating an executable program from source programs having templates.") Examiner Comments: Freyburger explicitly targets template functions for separate compilation.
Regarding Claim 3, Freyburger, and Thomas teach
The processor of Claim 1. Freyburger teaches wherein the one or more functions are located in header files (Col 1: ln 57-67, " This invention provides a simple method of implementing the separate compilation of templates by creating an executable program from source programs having templates comprising the steps of: providing a first source file having a template definition;”) Examiner Comments: Typically, the template definition is included in a header file which is included in the source file. Freyburger places template definitions in headers for inclusion; Freyburger teaches the limitation by describing standard practice for template locations in C++ compilation.
Regarding Claim 4, Freyburger, and Thomas teach
The processor of Claim 1. Freyburger teaches wherein the one or more functions are included in precompiled header files (Col 5: ln 1-20, “Each template instantiation file has a record associated with it. This record stores the directory of compilation 51, the compilation command 52, and a recompilation flag. Each template instance entry 53 in the repository files also have a record associated with it” ) Examiner Comments: The repository is a directory which is used to store the object files generated from the template instantiations. Freyburger's repository stores precompiled object files from templates, functioning like precompiled headers for reuse.
Regarding Claim 5, Freyburger, and Thomas teach The processor of Claim 1.
Freyburger did not specifically teach wherein the one or more circuits are to cause the compiler to record the number of times the one or more functions were previously compiled.
However, Thomas teaches
wherein the one or more circuits are to cause the compiler to record the number of times the one or more functions were previously compiled (Col 28: ln 60-67, "if fragments of the code of the method func are executed sufficient times by the interpreter such that the fragments are considered to be dominant path fragments of the code, they are queued for compilation.") Examiner Comments: The interpreter includes a counter for each fragment of code. The counter is incremented each time the fragment is executed. Thomas records execution counts via counters, analogous to recording compilation counts in repeated build scenarios.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Freyburger’s teaching with Thomas’s in order to reduce performance impact by compiling only frequently used code, as Thomas teaches "reduce the performance impact of online compilation" (Col 4: ln 60-67), thereby enhancing Freyburger's template compilation efficiency by avoiding unnecessary compilations of infrequently instantiated templates.
Regarding Claim 6, Freyburger, and Thomas teach
The processor of Claim 1.
Freyburger did not specifically teach wherein the one or more circuits are to cause the compiler to compile the one or more functions based on the number of times the one or more functions were previously compiled exceeding a threshold.
However, Thomas teaches wherein the one or more circuits are to cause the compiler to compile the one or more functions based on the number of times the one or more functions were previously compiled exceeding a threshold (Col 13: ln 40-53, “compilation of a fragment is triggered by the entry count of a block exceeding a given threshold. The threshold may be fixed, or dynamically tuned”) Examiner Comments: A threshold may be set for the number of times a fragment must be executed before it is considered a dominant path fragment. Thomas compiles when counts exceed a threshold, mapping to frequency-based decisions.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Freyburger’s teaching with Thomas’s in order to reduce performance impact by compiling only frequently used code, as Thomas teaches "reduce the performance impact of online compilation" (Col 4: ln 60-67), thereby enhancing Freyburger's template compilation efficiency by avoiding unnecessary compilations of infrequently instantiated templates.
Regarding Claim 8, is a system claim corresponding to the processor claim above (Claim 1) and, therefore, is rejected for the same reasons set forth in the rejection of claim 1.
Regarding Claim 9, is a system claim corresponding to the processor claim above (Claim 2) and, therefore, is rejected for the same reasons set forth in the rejection of claim 2.
Regarding Claim 10, is a system claim corresponding to the processor claim above (Claim 3) and, therefore, is rejected for the same reasons set forth in the rejection of claim 3.
Regarding Claim 11, is a system claim corresponding to the processor claim above (Claim 4) and, therefore, is rejected for the same reasons set forth in the rejection of claim 4.
Regarding Claim 12, is a system claim corresponding to the processor claim above (Claim 5) and, therefore, is rejected for the same reasons set forth in the rejection of claim 5.
Regarding Claim 13, is a system claim corresponding to the processor claim above (Claim 6) and, therefore, is rejected for the same reasons set forth in the rejection of claim 6.
Regarding Claim 15, is a method claim corresponding to the processor claim above (Claim 1) and, therefore, is rejected for the same reasons set forth in the rejection of claim 1.
Regarding Claim 16, is a method claim corresponding to the processor claim above (Claim 2) and, therefore, is rejected for the same reasons set forth in the rejection of claim 2.
Regarding Claim 17, is a method claim corresponding to the processor claim above (Claim 3) and, therefore, is rejected for the same reasons set forth in the rejection of claim 3.
Regarding Claim 18, is a method claim corresponding to the processor claim above (Claim 4) and, therefore, is rejected for the same reasons set forth in the rejection of claim 4.
Regarding Claim 19, is a method claim corresponding to the processor claim above (Claim 5) and, therefore, is rejected for the same reasons set forth in the rejection of claim 5.
Regarding Claim 20, is a method claim corresponding to the processor claim above (Claim 6) and, therefore, is rejected for the same reasons set forth in the rejection of claim 6.
Claim(s) 7 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Freyburger (US 6405368B1) in view of Thomas (US 8631219B2) further in view of Gao (US 7925646B2).
Regarding Claim 7, Freyburger, and Thomas teach
The processor of Claim 1.
Freyburger and Thomas did not specifically teach
wherein the one or more circuits are to cause the compiler to further identify the one or more functions to compile based on an amount of time used to compile the one or more functions.
However, Gao (US 7925646B2) teaches
wherein the one or more circuits are to cause the compiler to further identify the one or more functions to compile based on an amount of time used to compile the one or more functions (Col 1: ln 25-67, “The higher the optimization level, the better the chance of getting a good execution plan, but the longer the compilation time. Currently, database administrators must decide what the right optimization level is by trying to trade off the estimated compilation time against possible improvements in execution time. To automate such decisions, a meta-optimizer (MOP) is used. Just as plan execution costs are estimated in a query optimizer, an essential component in a MOP is a compilation time estimator (COTE). FIG. 1 describes how such an estimator can be used in a simple MOP to choose between two levels of optimization. MOP first compiles the query at the low level 102 and obtains an estimate (measured by time) of the execution cost (call it E 104) of the best plan it finds”) Examiner Comments: The total cost is a combination of the query execution time and the query compilation time. Gao estimates and uses compilation time to select optimization plans.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine Freyburger and Thomas’s teaching with Gao’s in order to balance compilation overhead with benefits, as Gao teaches providing a quantified estimate of the optimizer compilation time for a given query optimizer, thereby optimizing Freyburger's and Thomas' systems by avoiding time-intensive compilations (Abstract)..
Regarding Claim 14, is a system claim corresponding to the processor claim above (Claim 7) and, therefore, is rejected for the same reasons set forth in the rejection of claim 7.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMIR SOLTANZADEH whose telephone number is (571)272-3451. The examiner can normally be reached M-F, 9am - 5pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wei Mui can be reached at (571) 272-3708. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AMIR SOLTANZADEH/Examiner, Art Unit 2191
/WEI Y MUI/Supervisory Patent Examiner, Art Unit 2191