DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The prior art documents submitted by applicant in the Information Disclosure Statement filed 04/05/2024 have all been considered and made of record.
Election/Restrictions
Applicant’s election without traverse of group II in the reply filed on 06/23/2026 is acknowledged.
Joint Inventors
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
With regards to claims 10 and 19, the claims each recite “…forming a first integrated circuit over a substrate and having a lens region…”. It is unclear whether the first integrated circuit has a lens region, the substrate has a lens region, or if the lens region is elsewhere. The claim is indefinite because the limitations create confusion regarding the nature of the claimed method steps.
Examiner’s note: For the purposes of further examination, examiner will interpret the lens region as broadly existing within the overall device.
Claims 11-18 and 20 inherit the indefiniteness of claims 10 and 19 on which the respectively depend.
With regards to claim 12, the claim recites “…forming a first ILD layer…”. Claim 10 (on which claim 12 depends) introduces “an ILD layer”. It is unclear whether the “a first ILD layer”, the “a second ILD layer”, or neither is the “an ILD layer” introduced in claim 10. The claim is indefinite because the limitations create confusion regarding the nature of the claimed method steps.
Examiner’s note: For the purposes of further examination, examiner will interpret the” first ILD layer” of claim 12 as the “an ILD layer” of claim 10.
With regards to claim 17, the claim recites “…wherein each of the seal ring structure and interconnect structure comprises a conductive structure distributed through multiple metal layers…”. It is unclear if the “a conductive structure” itself comprises “multiple metal layers” or if the “a conductive structure” passes through other, distinct “multiple metal layers”. The claim is indefinite because the limitations create confusion regarding the nature of the claimed method steps.
Examiner’s note: For the purposes of further examination, examiner will interpret the “a conductive structure” as comprising “multiple metal layers”.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 10-11, and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Leobandung (US 9236328 B1).
With regards to claims 10 and 19, Leobandung discloses a method of forming a semiconductor device, comprising:
forming a first integrated circuit over a substrate and having a lens region (Fig2/First integrated circuit [Layers containing elements 206, 208, 214, and 204] and substrate 202; Fig4/Lens region [Region within element 402]);
forming an interconnect structure and a seal ring structure to surround the lens region (Fig4/Interconnect structure 406 and seal ring structure 402);
thereafter, forming an open hole in the lens region in an interlayer dielectric (ILD) structure (Fig5/Hole 520 and ILD 204);
filling in the open hole with a transparent material (Fig6/Transparent material 602; Column 5/Lines 57-60); and
forming a second integrated circuit over the substrate, wherein the second integrated circuit is coupled with the first integrated circuit (Fig9).
With regards to claim 11, Leobandung discloses the method of claim 10, further comprising forming an interconnect structure, wherein the interconnect structure and the seal ring structure are simultaneously formed (Fig4).
With regards to claim 17, Leobandung discloses the method of claim 10, wherein the forming a seal ring structure to surround the lens region further comprises simultaneously forming an interconnect structure, wherein each of the seal ring structure and interconnect structure comprises a conductive structure distributed through multiple metal layers (Fig9/multiple metal layers 222, 214, 224, and 216).
With regards to claims 18 and 20, Karhade discloses the method of claims 17 and 19 respectively, wherein the forming a seal ring structure to surround the lens region further comprises forming a via hole in the ILD structure (Fig2/Via hole 106a).
Claims 10, 19, 21-22, and 27-29 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Karhade (US 20230092821 A1).
With regards to claims 10 and 19, Karhade discloses a method of forming a semiconductor device, comprising:
forming a first integrated circuit over a substrate and having a lens region (Fig10a/First integrated circuit 114, substrate 502, and lens region [Region surrounded by element 141]);
forming an interconnect structure and a seal ring structure to surround the lens region (Fig10b/Interconnect structure 151 and seal ring 141);
thereafter, forming an open hole in the lens region in an interlayer dielectric (ILD) structure (Figs1a&Fig10b/Open hole 159 and ILD 133);
filling in the open hole with a transparent material (Paragraph 0101/Lines 22-28); and
forming a second integrated circuit over the substrate, wherein the second integrated circuit is coupled with the first integrated circuit (Fig10c/Second PIC 102).
With regards to claim 21, Karhade discloses a method of forming a semiconductor device, comprising:
attaching a first die to a substrate (Fig9a/First die [as indicated below] and substrate 502);
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forming a second die over the substrate, the second die is electrically connected with the first die (Fig10c/Second die 114);
forming a seal ring structure on the first die, wherein the seal ring structure is surrounding a lens region (Fig9c/Seal ring structure 141, lens region [Region surrounded by elements 141 and 145]);
forming an open hole in the first die within the lens region (Fig9c/Open hole within element 145); and
filling in the open hole with a transparent material, thereby forming an optical lens (Fig9c/Transparent material 140; Paragraph 54/Lines 45-52/“…optical lens…”; Paragraph 54/Lines 57-61).
With regards to claim 22, Karhade discloses the method of claim 21, wherein the optical lens includes a vertical post of the transparent material (Fig9c); and the seal ring structure is laterally surrounding the vertical post (Fig9c).
With regards to claim 27, Karhade discloses the method of claim 22, wherein the vertical post of the optical lens has one of a square shape or a round shape in a top view (Paragraph 101/Lines 35-37/“…for example, a circle…”).
With regards to claim 28, Karhade discloses the method of claim 22, wherein the first die further includes a grating coupler (Paragraph 54/Lines 30-31); and the vertical post of the optical lens includes silicon oxide having a curved surface to focus a received light to the grating coupler (Paragraph 54/Lines 61-63/“…may include an oxide material such as silicon oxide…”).
With regards to claim 29, Karhade discloses the method of claim 28, wherein the first die further comprises a waveguide and a photodiode configured on a light path of the received light (Fig1a/Waveguide 110 and photodiode 108).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 11-12, 14-16 and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Karhade (US 20230092821 A1).
With regards to claim 11, Karhade discloses the method of claim 10, further comprising forming an interconnect structure (Fig10a/Interconnect structure 151). Karhade does not specifically disclose the interconnect structure and the seal ring structure as being simultaneously formed. However, Karhade does disclose the interconnect structure and seal ring structure as being formed of conductive material (Paragraph 76/Lines 34; Paragraph 90/Lines 14-15; Paragraph 105/Lines 7-11/“…metal…”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the interconnect structure and the seal ring structure simultaneously since doing so would reduce the required number of fabrication steps.
With regards to claim 12, Karhade discloses the method of claim 11, wherein the forming the seal ring structure and the interconnect structure comprises
forming a first ILD layer (First ILD layer [Instance of element 33 applied per fig10b]);
forming first metal lines and first seal ring features in the first ILD layer (First metal lines 152 [post planarizing step] and first seal ring features 143 [post planarizing step]; Paragraph 0110);
forming a second ILD layer over the first ILD layer (Second ILD layer [Upper instance of element 33 applied per fig10c]); and
forming second metal lines and second seal ring features in the second ILD layer, wherein the forming an open hole in the lens region includes forming the open hole through the first and second ILD layers (Fig10c/Second metal lines 130, second seal ring features 144, hole portions in first and second ILD layers occupied by elements 138 and 140 respectively).
With regards to claim 14, Karhade discloses the method of claim 12, wherein each of the first and second ILD layers comprises an etch stop layer having silicon nitride or silicon carbide (Paragraph 79/Lines 12-16).
With regards to claim 15, Karhade discloses the method of claim 12, further comprising forming a grating coupler in the lens region, wherein the forming an open hole in the lens region comprises forming the open hole such that the grating coupler is exposed in the lens region (Paragraph 54/Lines 30-33).
With regards to claim 16, Karhade discloses the method of claim 12, but is silent regarding the transparent material being silicon oxide. However, it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice (In re Leshin, 125 USPQ 416). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select silicon oxide as the fill material since silicon oxide is known to be effective for both insulation and optical transparency.
With regards to claim 23, Karhade discloses the method of claim 22, but is silent regarding the spacing between the optical lens and the seal ring structure. However, it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art (In re Aller, 105 USPQ 233). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a distance of between 3 microns and 100 microns since doing so would facilitate device fabrication.
Allowable Subject Matter
Claim 13 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
With regards to claim 13, the prior art of record fails to disclose or reasonably suggest the method of claim 12, wherein the forming the seal ring structure and the interconnect structure further comprises forming a third ILD layer over the second ILD layer; and forming third metal lines and third seal ring features in the third ILD layer, wherein the forming an open hole in the lens region comprises forming the open hole through the third ILD layer in addition to the accompanying features of the independent claim and any intervening claims. The closest prior art was relied upon in the rejection set forth above.
Claims 24-26 are objected to as being dependent upon rejected base claims, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With regards to claim 24, the prior art of record fails to disclose or reasonably suggest the method of claim 22, wherein the seal ring structure includes a first seal ring layer laterally surrounding the vertical post; and a second seal ring layer laterally surrounding the first seal ring layer in addition to the accompanying features of the independent claim and any intervening claims. The closest prior art was relied upon in the rejection set forth above.
Claims 25 and 26 inherit the allowability of claim 24 on which they depend.
Conclusion
This prior art, made of record, but not relied upon, is considered pertinent to applicant’s disclosure since the following references have similar structure and/or use similar structure and/or similar optical elements to what is disclosed and/or claimed in the instant application:
Okada (US 20040150070 A1) [Figs1-2]
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MARC E MANHEIM/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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