Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/07/2024 is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-9,16-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kawada et al, ( US 20180061960 A1) in view of Ravi et al, US 20240006243 A1.
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Pertaining to claim 1 , Kawada teaches ( see fig.11 of Kawada above) A plurality of IGBTs (insulated gate bipolar transistors) comprising: a silicon carbide (SiC) substrate [1] of a first type; a merge layer [2] of the first type formed in overlying the silicon carbide substrate[1] wherein the merge layer comprises an epitaxial layer ( see para 0030); and at least one epitaxial layer[3] ( see para 0030) of a second type formed overlying the merge layer [2] wherein the plurality of IGBTs are formed in or overlying the at least one epitaxial layer
Kawada is silent about teaching wherein the merge layer is formed by on-axis epitaxial lateral overgrowth and is configured to reduce crystal defects in the at least one epitaxial layer.
However, in the same filed if endeavor, Ravi ( see fig17 of Ravi above) teaches wherein the merge layer [700] is formed by on-axis epitaxial lateral overgrowth ( see para 0021 or 0022 or 0107) and is configured to reduce crystal defects in the at least one epitaxial layer ( see para 0004 , 0065 of Ravi). In view of Ravi, it would have been obvious to one of ordinary skill in the art to the epitaxial layer of Kawada be formed by on-axis epitaxial lateral overgrowth and configure to reduce crystal defects as taught by Ravi as a result, deviations in the characteristics of the semiconductor device are suppressed, enabling yield and product reliability to be enhanced .
Pertaining to claim 2, Kawada teaches ( see fig.11 of Kawada above) The plurality of IGBTs of claim 1 wherein the silicon carbide substrate is <1120> crystal ( see para 0028 of Kawada).
Pertaining to claim 3, Kawada in view of Ravi teaches The plurality of IGBTs of claim 2, wherein they both teach using the merge layer to reduce the defect on the epitaxial layer just as the claim invention but did not specially teach wherein the at least one epitaxial layer has a defectivity less than 104 defects per square centimeter.
However, the ordinary artisan would have recognized the defectivity range to be a result effective variable affecting how low the defects need to be for a required layer . Thus, it would have been obvious to choose within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B.
Pertaining to claim 4, Kawada in view of Ravi teaches The plurality of IGBTs of claim 3, wherein Ravi teaches wherein an epitaxial layer [700] of the at least one epitaxial layer is greater than 50 microns thick ( see para 0058 of Ravi).
Pertaining to claim 5, Kawada in view of Ravi teaches The plurality of IGBTs of claim 2, wherein Ravi teaches ( see fig.10) wherein the merge layer[1000] further comprises: a plurality of openings pillars[810] etched in the silicon carbide substrate[100].
Pertaining to claim 6, Kawada in view of Ravi teaches The plurality of IGBTs of claim 5, wherein Ravi teaches ( see fig.10) wherein the plurality of openings are configured to form a plurality of pillars[810] in the merge layer[1000].
Pertaining to claim 7, Kawada in view of Ravi teaches The plurality of IGBTs of claim 6, wherein Ravi teaches ( see fig.10) wherein the on-axis epitaxial lateral overgrowth from adjacent pillars of the plurality of pillars in the merge layer [1000] is configured to merge-and wherein a surface of the on-axis epitaxial lateral overgrowth and the top surfaces of each of the pillars of the plurality of pillars forms a silicon carbide surface [900] on which the at least one epitaxial layer[1000] is grown.
Pertaining to claim 8, Kawada in view of Ravi teaches The plurality of IGBTs of claim 7, wherein Ravi teaches ( see fig.10) wherein the merge layer[1000] further comprises a mask layer[900] coupled to a bottom surface of each opening of the plurality of openings and wherein the mask layer[900] comprises carbon (see para 0071) or tantalum carbide.
Pertaining to claim 9, Kawada in view of Ravi teaches The plurality of IGBTs of claim 8, wherein Ravi teaches ( see fig.10) wherein the merge layer[1000] is a barrier to a propagation of crystal defects to the at least one epitaxial layer from the SiC substrate[100].
Pertaining to claim 16 , Kawada teaches ( see fig.11 of Kawada above) A plurality of IGBTs (insulated gate bipolar transistors) comprising: a silicon carbide (SiC) substrate [1] of a first type; a merge layer [2] of the first type formed in overlying the silicon carbide substrate[1] wherein the merge layer comprises an epitaxial layer ( see para 0030); and at least one epitaxial layer[3] ( see para 0030) of a second type formed overlying the merge layer [2] wherein the plurality of IGBTs are formed in or overlying the at least one epitaxial layer
Kawada is silent about teaching wherein a merge layer comprising: a plurality of openings etched in the 4H silicon carbide (SiC) A-plane <1120> substrate that form a plurality of pillars; a mask layer in the plurality of openings wherein the mask layer has a height less than each pillar of the plurality of pillars; a first epitaxial layer of the first type wherein the first epitaxial layer is grown by epitaxial lateral overgrowth
However, in the same filed if endeavor, Ravi ( see fig17 of Ravi above) teaches wherein the merge layer [700] is formed by on-axis epitaxial lateral overgrowth ( see para 0021 or 0022 or 0107) and is configured to reduce crystal defects in the at least one epitaxial layer ( see para 0004 , 0065 of Ravi) and wherein a merge layer [1000] in (fig.10) comprising :a plurality of openings etched in the 4H silicon carbide (SiC) A-plane <1120> substrate that form a plurality of pillars[810]; a mask layer[900] in the plurality of openings wherein the mask layer has a height less than each pillar [810] of the plurality of pillars; a first epitaxial layer [1000] of the first type wherein the first epitaxial layer is grown by epitaxial lateral overgrowth.
In view of Ravi, it would have been obvious to one of ordinary skill in the art to the epitaxial layer of Kawada be formed by on-axis epitaxial lateral overgrowth and configure to reduce crystal defects as taught by Ravi as a result, deviations in the characteristics of the semiconductor device are suppressed, enabling yield and product reliability to be enhanced .
Pertaining to claim 17, Kawada in view of Ravi teaches The plurality of IGBTs of claim 16, wherein Ravi teaches ( see fig.10) wherein the first epitaxial layer [1000] is configured to reduce Basil-Plane-Dislocations (BPDs) from propagating from the 4H silicon carbide (SiC) A-plane <1120> substrate to the at least one epitaxial layer ( see para 0043.
Pertaining to claim 18, Kawada in view of Ravi teaches The plurality of IGBTs of claim 17, wherein Ravi teaches ( see fig.10) wherein the mask layer [900]comprises carbon or tantalum carbide ( see para 0071 of Ravi.
Allowable Subject Matter
Claim11-15 allowed.
The following is an examiner's statement of reasons for allowance: The closest prior art of record of Kawada et al, ( US 20180061960 A1) in view of Ravi et al, US 20240006243 A1 teaches the limitation of " A plurality of IGBTs (insulated gate bipolar transistors) comprising: a 4H silicon carbide (SiC) A-plane <1120> substrate of a first type; a plurality of openings etched in the 4H silicon carbide (SiC) A-plane <1120> substrate wherein the plurality of openings form a plurality of pillars; a first epitaxial layer of the first type overlying the plurality of pillars and the plurality of openings wherein the first epitaxial layer is grown by epitaxial lateral overgrowth, but it does not teach or suggest, singularly or in combination, at least the limitations of the independent claim 11 including “a second epitaxial layer of a second type overlying the first epitaxial layer; a third epitaxial layer of the second type overlying the second epitaxial layer wherein the second and third epitaxial layer are grown formed by vertical epitaxial overgrowth, wherein the second epitaxial layer has a doping greater than the third epitaxial layer, and wherein the third epitaxial layer is greater than 25 microns thick; and the plurality of IGBTs formed in or overlying the third epitaxial layer wherein the third epitaxial layer is a drift layer for the plurality of IGBTs.”
Claims10 and 19-20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for allowance: The closest prior art of record of Kawada et al, ( US 20180061960 A1) in view of Ravi et al, US 20240006243 A1 teaches the limitation of claim 9 , but it does not teach or suggest, singularly or in combination, at least the limitations of the dependent claim 10 including “wherein the at least one epitaxial layer comprises: a first epitaxial layer of the second type overlying the merge layer; a second epitaxial layer of the second overlying the first epitaxial layer wherein the second type doping is greater in the first epitaxial layer than the second epitaxial layer; a current spreading layer of the second type in the second epitaxial layer; a body implant layer of the first type in the second epitaxial layer wherein the body implant layer overlies the current spreading layer; and wherein each IGBT of the plurality of IGBTs comprises: a trench etched through body implant layer and a portion of current spreading layer; a gate oxide layer on the walls of the trench; a gate electrode layer in the trench and coupled to the gate oxide layer; a source region of the second type in the body implant layer wherein the source region is adjacent to the gate oxide layer; an implant layer of the first type in the body implant layer wherein the implant layer is adjacent to the source region; a first electrode coupled to the source region and the implant layer; and a second electrode coupled to the merge layer.” in combination with the remaining limitations of the claim.
The following is an examiner's statement of reasons for allowance: The closest prior art of record of Kawada et al, ( US 20180061960 A1) in view of Ravi et al, US 20240006243 A1 teaches the limitation of claim 18 , but it does not teach or suggest, singularly or in combination, at least the limitations of the dependent claim 19 including
“wherein the at least one epitaxial layer comprises: a first epitaxial layer of the second type overlying the merge layer; a second epitaxial layer of the second overlying the first epitaxial layer wherein the second type doping is greater in the first epitaxial layer than the second epitaxial layer; a current spreading layer of the second type in the second epitaxial layer; and a body implant layer of the first type in the second epitaxial layer wherein the body implant layer overlies the current spreading layer” in combination with the remaining limitations of the claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO 892.
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/MAMADOU L DIALLO/Primary Examiner, Art Unit 2897
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