Prosecution Insights
Last updated: October 01, 2026
Application No. 18/628,890

SEMICONDUCTOR PACKAGE AND WIRING SUBSTRATE USED FOR THE SAME

Non-Final OA §102§103§112
Filed
Apr 08, 2024
Priority
Oct 13, 2023 — RE 10-2023-0136894
Examiner
LI, MEIYA
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
69%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 69% — above average
69%
Career Allowance Rate
653 granted / 945 resolved
+9.1% vs TC avg
Strong +26% interview lift
Without
With
+25.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
38 currently pending
Career history
990
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
39.5%
-0.5% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
43.3%
+3.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 945 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of group I, claims 1-17, in the reply filed on July 10, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claims 18-20 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on July 10, 2026. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on April 8, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters “42” and “142” have both been used to designate “pad”. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: “42” ([0050]); and “20” ([0056]). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-14 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. There appears to be no adequate description in the specification for the claim limitation of “a semiconductor chip disposed in the opening region”, as recited in claim 1 (note: Fig. 2, paragraphs [0026] and [0041] disclose that semiconductor chip is disposed on the opening region. For examination purposes, the examiner has interpreted this limitation based on Fig. 2. Clarification is requested. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The claimed limitation of “the second portion (of the molding portion) including a penetrating molding portion disposed in the first (vent) penetrating contact (in the first region)”, as recited in claims 1 and 15, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure (i.e. Fig. 5A shows that a first (or vent) penetrating contact includes a penetrating molding portion 154a and an extension portion 114c). See MPEP §2173.03. Also, it is unclear as to how a penetrating molding portion can be disposed in itself since the penetrating molding portion is a part of the first (vent) penetrating contact. For examination purposes, the examiner has interpreted “a first (vent) penetrating contact” to mean that “a first (vent) penetrating hole”. Clarification is requested. The claimed limitation of “at least one of an extension portion of the wiring pattern or the solder resist layer disposed inside of the second penetrating contact”, as recited in claim 9, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure (i.e. Fig. 5B shows that a second penetrating contact 130 includes an penetrating resist portion 116c and an extension portion 114c). See MPEP §2173.03. Also, it is unclear as to how a penetrating an extension portion of the wiring pattern and/or the solder resist layer can be disposed into itself since an extension portion of the wiring pattern and/or the solder resist layer are/is part(s) of the second penetrating contact. For examination purposes, the examiner has interpreted “a second penetrating contact” to mean that “a second penetrating hole”. Clarification is requested. The claimed limitation of “an extension portion of the wiring pattern on an inner surface of the first penetrating contact”, as recited in claim 14, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure (i.e. Fig. 5A shows that a first penetrating contact includes a penetrating molding portion 154a and an extension portion 114c). See MPEP §2173.03. Also, it is unclear as to how an extension portion of the wiring pattern can be on an inner surface of itself since the extension portion of the wiring pattern is a part of the first penetrating contact. For examination purposes, the examiner has interpreted “a first penetrating contact” to mean that “a first penetrating hole”. Clarification is requested. The claimed limitation of “at least one of an extension portion of the wiring pattern and the solder resist layer is disposed inside of the second penetrating contact”, as recited in claim 16, which indefinite and renders the claim uncertain because said limitation is inconsistent with the specification disclosure (i.e. Fig. 5B shows that a second penetrating contact 130 includes an penetrating resist portion 116c and an extension portion 114c). See MPEP §2173.03. Also, it is unclear as to how an extension portion of the wiring pattern and/or the solder resist layer can be disposed into itself since an extension portion of the wiring pattern and/or the solder resist layer are/is part(s) of the second penetrating contact. For examination purposes, the examiner has interpreted “a second penetrating contact” to mean that “a second penetrating hole”. Clarification is requested. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-8, as best understood, is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kindo (2015/0221587). As for claim 1, Kindo shows in Figs. 8A-8B and related text a semiconductor package 10-2, comprising: a wiring substrate 20-2 including a wiring pattern 24/26, a solder resist layer 22 disposed on the wiring pattern and including an opening region, and a first penetrating contact 27/27-2 disposed in the opening region of the solder resist layer; a semiconductor chip 30-3 (or 30-4) disposed in the opening region and connected to the wiring substrate; and a molding portion 50 including a first portion covering the semiconductor chip and a second portion disposed below the semiconductor chip, the second portion including a penetrating molding portion disposed in the first penetrating contact. As for claim 2, Kindo shows the first portion and the second portion include a same material and have an integral structure (Fig. 8B). As for claim 3, Kindo shows the semiconductor chip connected to the wiring substrate by an interconnection member 800 (or 40) (Figs. 8A-8B). As for claim 4, Kindo shows the first penetrating contact includes a plurality of first penetrating contacts, or the penetrating molding portion includes a plurality of penetrating molding portions (Fig. 8B). As for claim 5, Kindo shows the plurality of first penetrating contacts are spaced apart in a second direction at regular intervals (Fig. 8A). As for claim 6, Kindo shows the first penetrating contact is disposed at a side of the opening region in a third direction (Fig. 8B). As for claim 7, Kindo shows the wiring substrate has a first surface facing the semiconductor chip and a second surface opposite to the first surface, and the molding portion further includes a third portion disposed on the second surface of the wiring substrate (Fig. 8B). As for claim 8, Kindo shows the third portion of the molding portion has a shape longitudinally extending in a second direction, and the first penetrating contact includes a plurality of first penetrating contacts disposed on the third portion (Fig. 8B). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 9-17, as best understood, is/are rejected under 35 U.S.C. 103 as being unpatentable over Kindo (2015/0221587) in view of Shim et al. (5,729,432). As for claims 9-14, Kindo disclosed substantially the entire claimed invention, as applied to claim 1 above, except the wiring substrate further includes a second penetrating contact disposed in a region where the solder resist layer is disposed, and at least one of an extension portion of the wiring pattern or the solder resist layer disposed inside of the second penetrating contact (claim 9); the wiring substrate further includes a plurality of second penetrating contacts disposed in a region where the solder resist layer is disposed, and a number of the first penetrating contact is smaller than a number of the plurality of second penetrating contacts (claim 10); the wiring substrate further includes a second penetrating contact disposed in a region where the solder resist layer is disposed, and a size of the first penetrating contact is larger than a size of the second penetrating contact (claim 11); the wiring pattern is electrically connected to the first penetrating contact (claim 12); the first penetrating contact electrically connects portions of the wiring pattern disposed at different sides of the opening region and to which a same voltage is applied (claim 13); in a plan view, a width of the penetrating molding portion is greater than a width of an extension portion of the wiring pattern on an inner surface of the first penetrating contact (claim 14). As for claims 15-17, Kindo shows in Figs. 8A-8B and related text a semiconductor package 10-2, comprising: a wiring substrate 20-2 including a vent penetrating contact 27/27-2 in a first region; a semiconductor chip 30-3 (or 30-4) disposed on the wiring substrate; and a molding portion 50 including a first portion covering the semiconductor chip on the wiring substrate and a second portion disposed below the semiconductor chip, the second portion of the molding portion including a penetrating molding portion disposed in the vent penetrating contact in the first region; and the wiring substrate comprises a wiring pattern and a solder resist layer disposed on the wiring pattern. Kindo does not disclose a penetrating contact in a second region wherein the penetrating contact in the second region includes a material different from the penetrating molding portion in the first region (claim 15); at least one of an extension portion of the wiring pattern and the solder resist layer is disposed inside of the penetrating contact, and a size of the vent penetrating contact is larger than a size of the penetrating contact (claim 16); and a number of the vent penetrating contact is smaller than a number of the penetrating contact (claim 17). Shim et al. teach in Figs. 3D, 4 and related text: As for claim 9, the wiring substrate 7 further includes a second penetrating contact (edge ones) disposed in a region where the solder resist layer 5 is disposed, and at least one of an extension portion of the wiring pattern 10 or the solder resist layer disposed inside of the second penetrating contact (Fig. 4). As for claim 10, the wiring substrate further includes a plurality of second penetrating contacts (edge ones) disposed in a region where the solder resist layer is disposed, and a number of the first penetrating contact 2 is smaller than a number of the plurality of second penetrating contacts (Fig. 3D). As for claim 11, the wiring substrate further includes a second penetrating contact (edge ones) disposed in a region where the solder resist layer 5 is disposed, and a size of the first penetrating contact is larger than a size of the second penetrating contact (Figs. 3D and 4). As for claim 12, the wiring pattern 10 is electrically connected to the first penetrating contact 2 (Fig. 4). As for claim 13, the first penetrating contact electrically connects portions of the wiring pattern disposed at different sides of the opening region and to which a same voltage is applied (Fig. 4). As for claim 14, an extension portion of the wiring pattern on an inner surface of the first penetrating contact (Fig. 4). As for claim 15, a penetrating contact (edge ones) in a second region (edge portion). As for claim 16, at least one of an extension portion of the wiring pattern and the solder resist layer is disposed inside of the penetrating contact, and a size of the vent penetrating contact 2 is larger than a size of the penetrating contact. As for claim 17, a number of the vent penetrating contact is smaller than a number of the penetrating contact (Fig. 3D). Kindo and Shim et al. are analogous art because they are directed to a semiconductor package and one of ordinary skill in the art would have had a reasonable expectation of success to modify Kindo with the specified feature(s) of Shim because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention to include the specified features, as taught by Shim et al., in Kindo's device, in order to prevent moisture from penetrating to the semiconductor chip of the package, increase density of the interconnections, improve electrical properties and the packaging yield and reduce cost of the device. Therefore, the combined device shows: As for claim 14, in a plan view, a width of the penetrating molding portion is greater than a width of an extension portion of the wiring pattern on an inner surface of the first penetrating contact. As for claim 15, the penetrating contact in the second region includes a material different from the penetrating molding portion in the first region. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MEIYA LI whose telephone number is (571)270-1572. The examiner can normally be reached Monday-Friday 7AM-3PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LYNNE GURLEY can be reached at (571)272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MEIYA LI/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Apr 08, 2024
Application Filed
Sep 21, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
69%
Grant Probability
95%
With Interview (+25.8%)
3y 7m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 945 resolved cases by this examiner. Grant probability derived from career allowance rate.

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