CTNF 18/629,411 CTNF 101646 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Objections 07-29-01 AIA Claim s 10 and 19 are objected to because of the following informalities: Claim 10 recites “…form a second trench…”, which appears to be a typo and should be corrected to “…form ing a second trench…”. Claim 19 recites “…the second process gas includes at least from among…”, which appears to be missing an indication of quantity such as “…the second process gas includes at least one from among…” . Appropriate correction is required. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-8, 12-17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Tirukkonda et al. (US 20220208556 A1, hereinafter T1), and further in view of Veber et al. (US 20230298896 A1, hereinafter V1) . Regarding independent claim 1, T1 discloses in T1 FIG. 25A-25B and associated text A method for manufacturing a semiconductor device, the method comprising: forming a stack structure (the stack is interpreted as comprising at least a bottom-most first insulating layer 132) on a substrate (semiconductor layer 112) ; forming a first mask pattern on the stack structure (patterning film 331) ; forming a first trench (openings 149) inside the stack structure by performing a first etching process that etches a portion of the stack structure (first anisotropic etch through the stack comprising at least bottom-most first insulating layer 132; see T1 [0231], [0257]) ; and forming a first protective film pattern on a sidewall and an upper surface of the first mask pattern (cladding liner 335) , the first protective film pattern being present while the first etching process is performed (cladding liner 335 is formed before etching of the openings 149 (T1 [0239])) , wherein the first protective film pattern includes a material different from a material of the first mask pattern (cladding liner 335 consists essentially of a metal or metal nitride, e.g. molybdenum (T1 [0241]); patterning film 331 comprises amorphous carbon (T1 [0228])) , and wherein a thickness of a first portion of the first protective film pattern formed on the upper surface of the first mask pattern is greater than a thickness of a second portion of the first protective film pattern formed on the sidewall of the first mask pattern (as shown in FIG. 25A-25B). T1 does not explicitly disclose the first etching process using a first process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 , or the first protective film pattern includes a material different from a material of the first process gas . However, in the same field of endeavor, V1 discloses in V1 FIG. 4 and associated text the first etching process using a first process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 (the etch process 400 includes cyclical deposition (420) and etching (430) steps; the deposition process for forming a sidewall coating, corresponding to the first protective film pattern, comprises using a metal-containing gas, e.g. MoF6 (V1 [0067])), and the first protective film pattern includes a material different from a material of the first process gas (deposition step 420 comprises reducing the metal-containing gas into a metal or metal-containing nitride, silicide, oxide, or carbide (V1 [0068]), e.g. the molybdenum corresponding to T1’s cladding liner 335, different from MoF6). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of T1 with the use of MoF6 in the etching process of V1 to provide a protective film along sidewalls of the first trench to prevent lateral etch (V1 [0004]). Regarding dependent claim 2 , T1, as modified by V1, further discloses the method of claim 1, wherein the first protective film pattern includes at least one from among Mo polymer, Al polymer, and Mg polymer (the metal-containing gas (MoF6) is reduced to a polymerizable monomer source, which may include elemental metal and/or metal-containing nitride, silicide, oxide, or carbide (V1 [0068]), therefore the reduction product of MoF6 is considered a molybdenum polymer). Regarding dependent claim 3 , T1, as modified by V1, further discloses in T1 FIG. 25A-25B and associated text The method of claim 1, wherein the stack structure includes first layers (the stack as previously interpreted further includes first insulating layers 132) and second layers (the stack as previously interpreted further includes first sacrificial material layers 142) disposed on the substrate and alternately stacked on top of each other, the first layers and the second layers including different materials from each other (first insulating layers 132 comprise silicon oxide (T1 [0231]); first sacrificial layers 142 comprise silicon nitride (T1 [0231])). Regarding dependent claim 4 , T1, as modified by V1, further discloses in T1 FIG. 25A-25B and associated text The method of claim 3, wherein the first layers include oxide, and the second layers include nitride (first insulating layers 132 comprise silicon oxide (T1 [0231]); first sacrificial layers 142 comprise silicon nitride (T1 [0231])). Regarding dependent claim 5 , T1, as modified by V1, further discloses in T1 FIG. 25B and associated text The method of claim 1, wherein the first trench exposes a portion of an upper surface of the substrate (an upper surface of semiconductor layer 112 is exposed in openings 149). Regarding dependent claim 6 , T1, as modified by V1, further discloses in T1 FIG. 25B and associated text The method of claim 1, wherein the forming the stack structure on the substrate comprises: forming an etching stop film on the substrate; and forming the stack structure on the etching stop film (lower sacrificial liner 103 may function as an etch stop (T1 [0209]); the stack comprising at least bottom-most first insulating layer 132 is formed on lower sacrificial liner 103). Regarding dependent claim 7 , T1, as modified by V1, further discloses in T1 FIG. 25B and associated text The method of claim 6, wherein the forming the first trench inside the stack structure comprises etching the portion of the stack structure and a portion of the etching stop film so as to expose a portion of an upper surface of the substrate (openings 149 are formed through lower sacrificial liner (etch stop) 103 to expose an upper surface of semiconductor layer 112). Regarding dependent claim 8 , T1, as modified by V1, further discloses in T1 FIG. 25B and associated text The method of claim 6, wherein the forming the first trench inside the stack structure comprises etching the portion of the stack structure so as to expose a portion of an upper surface of the etching stop film (openings 149 are formed through lower sacrificial liner (etch stop) 103, which, while not shown in the figures, would inherently comprise, at some stage, exposing an upper surface of sacrificial liner 103). Regarding dependent claim 12 , T1, as modified by V1, further discloses in T1 FIG. 25A-25B and associated text The method of claim 1, wherein the stack structure is a single film including oxide (the stack as interpreted is a single film: a bottom-most first insulating layer 132, which is silicon oxide (T1 [0231])). Regarding independent claim 13, T1 discloses in T1 FIG. 25A-25B and associated text A method for manufacturing a semiconductor device, the method comprising: forming a stack structure on a substrate, the stack structure including first layers and second layers alternately stacked on top of each other, the first layers including oxide and the second layers including nitride (alternately stacked first insulating layers 132, silicon oxide, and first sacrificial layers 142, silicon nitride (T1 [0231]), are on semiconductor layer 112 (a substrate)) ; forming a first mask pattern on the stack structure (patterning film 331) ; forming a first trench (openings 149) inside the stack structure by performing a first etching process that etches a portion of the stack structure (first anisotropic etch through the stack (132, 142); see T1 [0231], [0257]) ; and forming a first protective film pattern on a sidewall and an upper surface of the first mask pattern (cladding liner 335) , the first protective film pattern being present while the first etching process is performed (cladding liner 335 is formed before etching of the openings 149 (T1 [0239])) , T1 does not explicitly disclose the first etching process using a first process gas including at least one from among MoF6, MoF4, AlF3, and MgF2 , or the first protective film pattern includes at least one from among an Mo polymer, an Al polymer, and an Mg polymer . However, in the same field of endeavor, V1 discloses in V1 FIG. 4 and associated text the first etching process using a first process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 (the etch process 400 includes cyclical deposition (420) and etching (430) steps; the deposition process for forming a sidewall coating, corresponding to the first protective film pattern, comprises using a metal-containing gas, e.g. MoF6 (V1 [0067])), and the first protective film pattern includes at least one from among an Mo polymer, an Al polymer, and an Mg polymer (the metal-containing gas (MoF6) is reduced to a polymerizable monomer source, which may include elemental metal and/or metal-containing nitride, silicide, oxide, or carbide (V1 [0068]), therefore the reduction product of MoF6 is considered a molybdenum polymer). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of T1 with the use of MoF6 in the etching process of V1 to provide a protective film along sidewalls of the first trench to prevent lateral etch (V1 [0004]). Regarding dependent claim 14 , T1, as modified by V1, further discloses the method of claim 13, wherein the first protective film pattern includes a material different from a material of the first mask pattern (cladding liner 335 consists essentially of a metal or metal nitride, e.g. molybdenum (T1 [0241]), or a molybdenum polymer, as combined; patterning film 331 comprises amorphous carbon (T1 [0228])). Regarding dependent claim 15 T1, as modified by V1, further discloses in T1 FIG. 25A-25B the method of claim 13, wherein a thickness of a first portion of the first protective film pattern formed on the upper surface of the first mask pattern is greater than a thickness of a second portion of the first protective film pattern formed on the sidewall of the first mask pattern (as shown in FIG. 25A-25B). Regarding dependent claim 16 , T1, as modified by V1, further discloses in T1 FIG. 25B and associated text The method of claim 13, wherein the first trench exposes a portion of an upper surface of the substrate (an upper surface of semiconductor layer 112 is exposed in openings 149). Regarding dependent claim 17 , T1, as modified by V1, further discloses the method of claim 13, wherein the first protective film pattern includes: a first portion formed on the sidewall and the upper surface of the first mask pattern (cladding layer 335 as shown in T1 FIG. 25A-25B) ; and a second portion formed on a sidewall of each of the second layers exposed by the first trench (the protective film deposited by the process 400 of V1 FIG. 4 is along sidewalls of the trench being etched in the substrate (block 420), which comprises layers of nitride corresponding to the second layers (V1 [0049]); V1 FIG. 6A shows in situ liner (protective film) 610 is formed all along the sidewalls of the etched feature 602, therefore it is formed on each of the second layers exposed by the trench). Regarding independent claim 20, T1 discloses in T1 FIG. 25A-25B and associated text A method for manufacturing a semiconductor device, the method comprising: forming a stack structure on a substrate, the stack structure including first layers and second layers alternately stacked on top of each other, the first layers including oxide and the second layers including nitride (alternately stacked first insulating layers 132, silicon oxide, and first sacrificial layers 142, silicon nitride (T1 [0231]), are on semiconductor layer 112 (a substrate)) ; forming a mask pattern on the stack structure (patterning film 331) ; forming a trench (openings 149) inside the stack structure by performing an etching process that etches a portion of the stack structure, the trench exposing a portion of an upper surface of the substrate (first anisotropic etch through the stack (132, 142) exposes an upper surface of semiconductor layer 112; see T1 [0231], [0257]) ; and forming a protective film pattern on a sidewall and an upper surface of the mask pattern (cladding liner 335) , the protective film pattern being present while the etching process is performed (cladding liner 335 is formed before etching of the openings 149 (T1 [0239])) , wherein the protective film pattern includes a material different from a material of the mask pattern (cladding liner 335 consists essentially of a metal or metal nitride, e.g. molybdenum (T1 [0241]); patterning film 331 comprises amorphous carbon (T1 [0228])) , and wherein a thickness of a first portion of the protective film pattern formed on the upper surface of the mask pattern is greater than a thickness of a second portion of the protective film pattern formed on the sidewall of the first mask pattern (as shown in FIG. 25A-25B). T1 does not explicitly disclose the first etching process using a process gas including at least one from among MoF6, MoF4, AlF3, and MgF2 , or the protective film pattern includes at least one from among an Mo polymer, an Al polymer, and an Mg polymer . However, in the same field of endeavor, V1 discloses in V1 FIG. 4 and associated text the first etching process using a first process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 (the etch process 400 includes cyclical deposition (420) and etching (430) steps; the deposition process for forming a sidewall coating, corresponding to the first protective film pattern, comprises using a metal-containing gas, e.g. MoF6 (V1 [0067])), and the first protective film pattern includes at least one from among an Mo polymer, an Al polymer, and an Mg polymer (the metal-containing gas (MoF6) is reduced to a polymerizable monomer source, which may include elemental metal and/or metal-containing nitride, silicide, oxide, or carbide (V1 [0068]), therefore the reduction product of MoF6 is considered a molybdenum polymer). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of T1 with the use of MoF6 in the etching process of V1 to provide a protective film along sidewalls of the first trench to prevent lateral etch (V1 [0004]) . 07-21-aia AIA Claim s 9-11 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over T1, and further in view of V1 and Otsuka et al. (US 20100248456 A1, hereinafter O1) . Regarding dependent claim 9, T1, as modified by V1, further discloses in T1 FIG. 25C The method of claim 1, further comprising: removing, after the forming the first trench, the first mask pattern and the first protective film pattern (patterning film 331 and cladding layer 335 are removed). They do not explicitly disclose forming a lower electrode in the first trench . However, in the same field of endeavor, O1 discloses in O1 FIG. 1 and associated text forming a lower electrode in the first trench (lower electrode 9 formed in hole 8). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of T1, as modified by V1, with the formation of an electrode of O1 to provide new functionality to the semiconductor device with, for example, the electrode serving as an electrode of a capacitor (O1 [0047]). Regarding dependent claim 10, T1, as previously modified by V1 and O1, further discloses in O1 FIG. 4 and associated text The method of claim 9, further comprising: after forming the lower electrode, form ing a second trench exposing a sidewall of the lower electrode by performing a second etching process that etches another portion of the stack structure (inter-layer film 6, corresponding to another portion of the stack as previously interpreted, is etched to expose sidewalls of lower electrode 19). The references, as previously combined, do not explicitly disclose forming a second mask pattern on the stack structure and the lower electrode ; forming a second protective film pattern on a sidewall and an upper surface of the second mask pattern, the second protective film pattern being present while the second etching process is performed ; or the second etching process uses a second process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 . T1, as previously modified by V1 and O1, discloses a base method of manufacturing which the claimed invention can be seen as an improvement in that the claimed process protects against lateral etching. T1 discloses in T1 FIG. 23A, 25A-25B associated text a known technique of forming a mask pattern on the stack structure and the lower electrode (patterning film 331 is formed over the entirety of the device except where trenches are to be formed, which would include the stack structure as shown and the lower electrode, when combined, to protect it from etching); forming a protective film pattern on a sidewall and an upper surface of the mask pattern, the protective film pattern being present while the etching process is performed (cladding liner 335 is formed before etching of the openings 149 (T1 [0239])); and V1 discloses in V1 FIG. 4 and associated text the etching process uses a process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 (the etch process 400 includes cyclical deposition (420) and etching (430) steps; the deposition process for forming a sidewall coating, corresponding to the first protective film pattern, comprises using a metal-containing gas, e.g. MoF6 (V1 [0067])) that is comparable to the base process/product. T1’s and V1’s known techniques, as cited above, would have been recognized by one skilled in the art as applicable to the base method of manufacturing of T1, as previously modified by V1 and O1, and the results would have been predictable and resulted in protection against lateral etching, distortion, and bowing in the lower electrode and surrounding features exposed by the second trench (T1 [0249], V1 [0004]) which results in an improved integrity of the semiconductor device. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art at the time of the effective filing date of the invention. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. Regarding dependent claim 11 , T1, as modified by V1 and O1, further discloses the method of claim 10, wherein the second protective film pattern includes a material different from a material of each of the second mask pattern and the second process gas (cladding liner 335 consists essentially of a metal or metal nitride, e.g. molybdenum (T1 [0241]); patterning film 331 comprises amorphous carbon (T1 [0228]); metal-containing gas comprises MoF6 (V1 [0067])) , and wherein a thickness of a portion of the second protective film pattern formed on the upper surface of the second mask pattern is greater than a thickness of a portion of the first protective film pattern formed on the sidewall of the second mask pattern (cladding liner 335 as shown in T1 FIG. 25A-25B). Regarding dependent claim 18, T1, as modified by V1, further discloses in T1 FIG. 25C The method of claim 13, further comprising: removing, after the forming the first trench, the first mask pattern and the first protective film pattern (patterning film 331 and cladding layer 335 are removed). They do not explicitly disclose forming a lower electrode in the first trench . However, in the same field of endeavor, O1 discloses in O1 FIG. 1 and associated text forming a lower electrode in the first trench (lower electrode 9 formed in hole 8). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the method of T1, as modified by V1, with the formation of an electrode of O1 to provide new functionality to the semiconductor device with, for example, the electrode serving as an electrode of a capacitor (O1 [0047]). Regarding dependent claim 19, T1, as previously modified by V1 and O1, further discloses in O1 FIG. 4 and associated text The method of claim 18, further comprising: after the forming the lower electrode, forming a second trench exposing a sidewall of the lower electrode by performing a second etching process that etches another portion of the stack structure (inter-layer film 6, corresponding to another portion of the stack as previously interpreted, is etched to expose sidewalls of lower electrode 19). The references, as previously combined, do not explicitly disclose forming a second mask pattern on the stack structure and the lower electrode ; forming a second protective film pattern on a sidewall and an upper surface of the second mask pattern, the second protective film pattern being present while the second etching process is performed ; or the second etching process uses a second process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 . T1, as previously modified by V1 and O1, discloses a base method of manufacturing which the claimed invention can be seen as an improvement in that the claimed process protects against lateral etching. T1 discloses in T1 FIG. 23A, 25A-25B associated text a known technique of forming a mask pattern on the stack structure and the lower electrode (patterning film 331 is formed over the entirety of the device except where trenches are to be formed, which would include the stack structure as shown and the lower electrode, when combined, to protect it from etching); forming a protective film pattern on a sidewall and an upper surface of the mask pattern, the protective film pattern being present while the etching process is performed (cladding liner 335 is formed before etching of the openings 149 (T1 [0239])); and V1 discloses in V1 FIG. 4 and associated text the etching process uses a process gas including at least one from among MoF6, MoF4, AlF3 and MgF2 (the etch process 400 includes cyclical deposition (420) and etching (430) steps; the deposition process for forming a sidewall coating, corresponding to the first protective film pattern, comprises using a metal-containing gas, e.g. MoF6 (V1 [0067])) that is comparable to the base process/product. T1’s and V1’s known techniques, as cited above, would have been recognized by one skilled in the art as applicable to the base method of manufacturing of T1, as previously modified by V1 and O1, and the results would have been predictable and resulted in protection against lateral etching, distortion, and bowing in the lower electrode and surrounding features exposed by the second trench (T1 [0249], V1 [0004]) which results in an improved integrity of the semiconductor device. Therefore, the claimed subject matter would have been obvious to a person having ordinary skill in the art at the time of the effective filing date of the invention. The rationale to support a conclusion that the claim would have been obvious is that a particular known technique was recognized as part of the ordinary capabilities of one skilled in the art. One of ordinary skill in the art would have been capable of applying this known technique to a known device (method, or product) that was ready for improvement and the results would have been predictable to one of ordinary skill in the art. Conclusion Pertinent Art 07-96 The prior art made of record and not relied upon is considered pertinent to the applicant’s disclosure: US 20160163558 A1, pertaining to sidewall passivation for high aspect ratio etching. Any inquiry concerning this communication or earlier communications from the examiner should be directed to EVERETT TRAJAN RIRIE whose telephone number is (571) 272-9559. The examiner can normally be reached Mon - Thu 8:30 am - 6:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /EVERETT T RIRIE/Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897 Application/Control Number: 18/629,411 Page 2 Art Unit: 2897 Application/Control Number: 18/629,411 Page 3 Art Unit: 2897 Application/Control Number: 18/629,411 Page 4 Art Unit: 2897 Application/Control Number: 18/629,411 Page 5 Art Unit: 2897 Application/Control Number: 18/629,411 Page 6 Art Unit: 2897 Application/Control Number: 18/629,411 Page 7 Art Unit: 2897 Application/Control Number: 18/629,411 Page 8 Art Unit: 2897 Application/Control Number: 18/629,411 Page 9 Art Unit: 2897 Application/Control Number: 18/629,411 Page 10 Art Unit: 2897 Application/Control Number: 18/629,411 Page 11 Art Unit: 2897 Application/Control Number: 18/629,411 Page 12 Art Unit: 2897 Application/Control Number: 18/629,411 Page 13 Art Unit: 2897 Application/Control Number: 18/629,411 Page 14 Art Unit: 2897 Application/Control Number: 18/629,411 Page 15 Art Unit: 2897
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