DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 04/08/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In Claims 1 & 11, lines 11-12, the recitation of “the drain of the first N-type transistor” and , and “the drain of the second N-type transistor is coupled to the output terminal” which lacks of antecedent basis. Further clarification is needed.
In Claim 1, lines 23, the recitation of “a drain of the first P-type transistor” it is not clear because multiple drain terminals being cited for the same the first P-type transistor. Further clarification is needed.
In Claims 6 & 18, the recitation of “wherein in the second amplification stage, the first P-type transistor and the first N-type transistor are close to but has not yet entered into the cutoff region, and the second P-type transistor and the second N-type transistor has left the cutoff region” it is not clear as to how the second amplification stage, the first P-type transistor and the first N-type transistor would determine that they are close to but has not yet entered into the cutoff region, and the second P-type transistor and the second N-type transistor has left the cutoff region and how close is considered as close and also how to determine that the second P-type transistor and the second N-type transistor has left the cutoff region. Further clarification is needed.
Claims 2-5, 7-10, 12-17 & 19-20 are rejected due to their dependency.
Allowable Subject Matter
Claims 2-5, 7-10, 12-17 & 19-20 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 7898449 B2: Fig. 8 of Kawahito discloses an amplifier comprising transistor MP1 connected to transistor MP2 and wherein an output VOUTN connected between the transistor MP2 and transistor MN2, a transistor MN1 being connected to the transistor MN2.
US 11664774 B2: Fig. 2 Lin et al. discloses an amplifier comprising a transistor MP1 connected in series with transistor MP3 and transistor MN1 connected in series with transistor MN2 and wherein an output terminal being connected between transistors MP5 and MN5.
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/KHIEM D NGUYEN/Examiner, Art Unit 2843
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