DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted has been considered by the examiner.
Claim Objections
The claim(s) is/are objected to because of the following informalities:
Claim 14: it appears that “a memory device” in line(s) 6 was meant to be -- the memory device --.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites the limitation “storing the updated set of configuration setting values” in line 14. It is unclear as to which updated set of configuration setting values the limitation refers to, i.e. corresponding to the set of configuration setting values or the configuration adjustment definition. For purposes of examination, the limitation will be construed as storing the updated set of configuration setting values corresponding to both of the aforementioned.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7, 9-16, 18-19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Melik-Martirosian (US 2012/0239991).
Regarding claim 1, Melik-Martirosian discloses a method comprising:
receiving (fig. 1), by one or more processing devices (“processor of controller 101” fig. 1 para 0023), a request to perform an adjustment operation (“controller 101 is configured to adjust memory operating conditions” para 0024, i.e. based on the request that was sent; Abstract) on one or more configuration setting values (memory parameter(s), i.e. operating conditions such as read levels and/or program verify levels; para 0024, 0052-0053) of a memory device (103; fig. 1);
calculating one or more updated configuration setting values (updated memory parameter(s) are calculated by figuring out new memory parameter(s); para 0050-0051) by applying a multiplier value (multiples of any incremental value; para 0036) to the one or more configuration setting values (the incremental value applied to the memory parameter(s) to calculate updated memory parameter(s); para 0036, 0050-0051) based on a configuration adjustment definition (memory parameter(s) adjustments defined according to possible adjustments based on number of program/erase cycles and/or retention time; fig.4) associated with the one or more configuration setting values (i.e. memory parameter(s)), wherein the multiplier value (multiples of any incremental value) is associated with a number of memory operations performed (a number of program/erase cycles; para 0036, 0051) on the memory device (103); and
storing (i.e. setting) the one or more updated configuration setting values (setting the adjusted memory operating conditions, i.e. “test modes accessible via the test register [106] may be used to input or modify certain programming conditions of flash memory 103” para 0030, 0040) to one or more corresponding configuration registers (106; para 0040).
Regarding claim 2, Melik-Martirosian discloses the method, wherein the request comprises an indication of the multiplier value (fig. 5).
Regarding claim 3, Melik-Martirosian discloses the method, wherein the request comprises the number of memory operations performed on the memory device (para 0024), the method further comprising: determining whether the number of operations satisfies a threshold criterion associated with the one or more configuration setting values (S502; fig. 5); and responsive to determining that the number of memory operations satisfies the threshold criterion (Yes at S502; fig. 5), calculating the multiplier value in view of the number of memory operations (S503; fig. 5).
Regarding claim 4, Melik-Martirosian discloses the method, wherein determining the configuration adjustment definition associated with the one or more configuration setting values comprises: determining one or more configuration adjustment definitions associated with one or more corresponding configuration setting values (fig. 4); and calculating the updated one or more configuration setting values by applying the multiplier value to each configuration adjustment definition (para 0050-0051, 0055).
Regarding claim 5, Melik-Martirosian discloses the method, wherein the request comprises an identifier associated with the one or more configuration setting values (para 0050), and wherein the one or more configuration setting values comprises a subset of a total number of configuration setting values of the memory device (para 0036).
Regarding claim 6, Melik-Martirosian discloses the method, further comprising: determining the one or more configuration setting values in view of the identifier in the request (fig. 5).
Regarding claim 7, Melik-Martirosian discloses the method, wherein the one or more configuration setting values comprises a total number of configuration setting values for the memory device (para 0036).
Regarding claim 9, Melik-Martirosian discloses a method comprising:
monitoring (“monitor a circuit characteristic of flash memory 103 (for example, P/E cycle or retention time)” fig. 5 para 0050), by one or more processing devices (“processor of controller 101” fig. 1 para 0023), a number of programming operations (a value of P/E cycle or retention time) performed on memory cells (controller 101 monitors the value performed reaching a limit/range; para 0050) of a memory device (103; fig. 1);
determining (S502; fig. 5) whether the number of memory operations performed (i.e. the value of P/E cycle or retention time performed) on the memory cells of the memory device (103) satisfies a threshold criterion (i.e. by reaching the limit/range to cause a trigger event; para 0051) associated with one or more configuration setting values (memory parameter(s), i.e. operating conditions such as read levels and/or program verify levels; para 0024, 0052-0053) of the memory device (103); and
responsive (Yes S502; fig. 5) to determining that the number of memory operations performed (i.e. the value of P/E cycle or retention time performed) on the memory cells of the memory device (103) satisfies the threshold criterion (step S502, controller 101 determines that the memory block has reached the limit and/or entered the range; para 0050), sending a request to the memory device to cause the memory device (“on determining the parameter a command is sent to the memory circuit [i.e. controller 101 of the memory device 103]” Abstract) to perform an adjustment operation (“controller 101 is configured to adjust memory operating conditions” para 0024, i.e. based on the request) on the one or more configuration setting values (i.e. memory parameter(s)) of the memory device using a multiplier value (multiples of any incremental value; para 0036) associated with the one or more configuration setting values (i.e. memory parameter(s)).
Regarding claim 10, Melik-Martirosian discloses the method, further comprising:
causing the memory device to store (i.e. setting) one or more updated configuration setting values (updated memory parameter(s) calculated by figuring out new memory parameter(s); para 0050-0051) to one or more corresponding configuration registers (106; para 0040), wherein the one or more updated configuration setting values are based on the one or more configuration setting values and the multiplier value (fig. 4, further para 0036, 0050-0051.
Regarding claim 11, Melik-Martirosian discloses the method, further comprising:
determining the multiplier value in view of a range of the number of programming operations (para 0043), wherein the multiplier value indicates an adjustment factor for the memory device to apply to an adjustment definition (memory parameter(s) adjustments defined according to possible adjustments based on number of program/erase cycles and/or retention time; fig.4) associated with the one or more configuration setting values; and
sending an indication of the multiplier value to the memory device in the request (fig. 5).
Regarding claim 12, Melik-Martirosian discloses the method, wherein the request specifies that memory device is to perform the adjustment operation on all configuration setting values of the memory device (para 0048).
Regarding claim 13, Melik-Martirosian discloses the method, wherein the request comprises an identifier associated with the one or more configuration setting values (para 0050), and wherein the one or more configuration setting values comprises a subset of a total number of configuration setting values of the memory device (para 0036).
Regarding claim 14, Melik-Martirosian discloses a system comprising:
a memory device (103; fig. 1); and
a processing device (“processor of controller 101” fig. 1 para 0023), operatively coupled (i.e. via interface 105; fig. 1) with the memory device (103) to perform operations comprising:
receiving (via host device 104; fig. 1) a request (i.e. instructions) to perform an adjustment operation (“controller 101 is configured to adjust memory operating conditions” para 0024, i.e. based on the request) on a set of configuration setting values (memory parameter(s), i.e. operating conditions such as read levels and/or program verify levels; para 0024, 0052-0053) for a memory device (103);
calculating an updated set of configuration setting values (updated memory parameter(s) are calculated by figuring out new memory parameter(s); para 0050-0051) by applying a multiplier value (multiples of any one of an incremental value or a specific value; para 0036, 0039) to the set of configuration setting values (the incremental value applied to the memory parameter(s) to calculate updated memory parameter(s); para 0036, 0050-0051) based on a configuration adjustment definition (memory parameter(s) adjustments defined according to possible adjustments based on number of program/erase cycles and/or retention time; fig.4) associated with one or more configuration setting values (i.e. for the program verify levels, values of 20 mV, 30 mV, 100 mV, 500 mV, etc.; para 0036) of the set of configuration setting values (i.e. memory parameter(s)); and
calculating an updated set of configuration setting values (another updated memory parameter(s) are calculated by figuring out new memory parameter(s); para 0055) by applying a multiplier value (multiples of any other one of the incremental value or the specific value; para 0036, 0039) to the configuration adjustment definition (i.e. the possible adjustments based on number of program/erase cycles and/or retention time; fig.4), wherein the multiplier value (multiples of any incremental value) is associated with a number of programming operations performed (a number of program/erase cycles; para 0036, 0051, 0055) on the memory device (103); and
storing (i.e. setting) the updated set of configuration setting values (setting the adjusted memory operating conditions, i.e. “test modes accessible via the test register [106] may be used to input or modify certain programming conditions of flash memory 103” para 0030, 0040) to a set of corresponding configuration registers (106; para 0040).
Regarding claim 15, Melik-Martirosian discloses the system, wherein the request comprises an indication of the multiplier value (fig. 6).
Regarding claim 16, Melik-Martirosian discloses the system, wherein the request comprises the number of memory operations performed on the memory device (para 0024), and wherein the processing device is to perform further operations comprising: determining whether the number of memory operations satisfies a threshold (S602; fig. 6); and responsive to determining that the number of programming operations satisfies the threshold (Yes S602; fig. 6), calculating the multiplier value in view of the number of memory operations (S603; fig. 6).
Regarding claim 18, Melik-Martirosian discloses the system, wherein the request comprises an identifier associated with the set of configuration setting values (para 0050), and wherein the set of configuration setting values comprises a subset of a total number of configuration setting values of the memory device (para 0036).
Regarding claim 19, Melik-Martirosian discloses the system, wherein the processing device is to perform further operations comprising: determining the set of configuration setting values in view of the identifier in the request (fig. 6).
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim(s) 1-9, 11-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claim(s) 1-19 of U.S. Patent No. 11,984,174. Although the claims at issue are not identical, they are not patentably distinct from each other because the only differences are nominal and would have been obvious to one of ordinary skill in the art.
Allowable Subject Matter
Claim(s) 8, 17, 20 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record and considered pertinent to the applicant's disclosure does not teach or suggest the claimed invention having the following limitation, in combination with the remaining claimed limitations.
With respect to dependent claim 8, the prior art fails to teach or suggest the claimed limitations, namely the configuration adjustment definition is a polynomial equation comprising a plurality of operands, wherein a first operand of the plurality of operands comprises a default configuration setting value, wherein a second operand of the plurality of operand comprises an incremental change value associated with an expected slope of change for the configuration setting, and wherein the incremental change value is modified by the multiplier value.
With respect to dependent claim 17, the prior art fails to teach or suggest the claimed limitations, namely calculating the updated set of configuration setting values by applying the multiplier value to each configuration adjustment definition of the set of configuration adjustment definitions.
With respect to dependent claim 20, the prior art fails to teach or suggest the claimed limitations, namely the configuration adjustment definition is a polynomial equation comprising a plurality of operands, wherein a first operand of the plurality of operands comprises a default configuration setting value, wherein a second operand of the plurality of operand comprises an incremental change value associated with an expected slope of change for the configuration setting, and wherein the incremental change value is modified by the multiplier value.
The allowable claims are supported in at least fig. 3 of the instant application.
Conclusion
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/UYEN SMET/
Primary Examiner, Art Unit 2824
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