DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-9 in the reply filed on 06/08/26 is acknowledged.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Xue(USPGPUB DOCUMENT: 2014/0315350, hereinafter Xue) in view of Magnus(USPGPUB DOCUMENT: 2018/0315734, hereinafter Magnus).
Re claim 1 Xue discloses a semiconductor package comprising: a semiconductor substrate(100/101) having a front surface and a back surface opposite the front surface of the semiconductor substrate(100/101); a plurality of contact pads(1200) attached to the front surface of the semiconductor substrate(100/101); a seed layer(140) having a front surface and a back surface opposite the front surface of the seed layer(140), the front surface of the seed layer(140) being directly attached to the back surface of the semiconductor substrate(100/101); a metal support(124) having a plurality of side surfaces, a front surface, and a back surface opposite the front surface of the metal support(124), the front surface of the metal support(124) being directly attached to the back surface of the seed layer(140);
Xue does not disclose a molding encapsulation directly contacting the plurality of side surfaces and the back surface of the metal support(124); wherein a thickness of the semiconductor substrate(100/101) is less than 50 microns; and wherein a thickness of the metal support(124) is at least 30 microns.
Magnus disclose a molding encapsulation(513/503/507) directly contacting the plurality of side surfaces and the back surface of the metal support(523/504/506);
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Magnus to the teachings of Xue in order to electronic component encapsulated in an encapsulant that allows the components to be used in a system [0002, Magnus].
Xue and Magnus does not disclose wherein a thickness of the semiconductor substrate(100/101) is less than 50 microns; and wherein a thickness of the metal support(124) is at least 30 microns.
Although the combination of Xue and Magnus does not disclose wherein a thickness of the semiconductor substrate(100/101) is less than 50 microns; and wherein a thickness of the metal support(124) is at least 30 microns, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to disclose wherein a thickness of the semiconductor substrate(100/101) is less than 50 microns; and wherein a thickness of the metal support(124) is at least 30 microns as the result effective variable meet the claims as varied through routine experimentation in order to optimize the functionality of the device and when the prior art discloses the general conditions of the claimed invention, discovering the optimum or workable ranges involves only ordinary skill in the art to optimize the electronic component encapsulated in an encapsulant that allows the components to be used in a system [0002, Magnus]. See MPEP 2144.05.
Further, the specification contains no disclosure of either the critical nature of the claimed invention or any unexpected results arising therefrom. The law is replete with cases in which the difference between the claimed invention and the prior art is some range or other variable within the claims. In such a situation, the applicant must show that the particular range is critical, generally by showing that the claimed range achieves unexpected results relative to the prior art range. In reWoodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)
Re claim 2 Xue and Magnus disclose the semiconductor package of claim 1, wherein the thickness of the semiconductor substrate(100/101) is in a range of 15 microns to 35 microns.
Re claim 3 Xue and Magnus disclose the semiconductor package of claim 1, edges of the molding encapsulation align with edges of the seed layer(140) and edges of the semiconductor substrate(100/101).
Re claim 4 Xue and Magnus disclose the semiconductor package of claim 1, wherein the seed layer(140) is composed of titanium.
Re claim 5 Xue and Magnus disclose the semiconductor package of claim 1, wherein the metal support(124) is composed of copper.
Re claim 6 Xue and Magnus disclose the semiconductor package of claim 1, wherein the metal support(124) is composed of sliver.
Re claim 7 Xue and Magnus disclose the semiconductor package of claim 1, wherein a thickness of the seed layer(140) is in a range from 0.4 micron to 1.3 microns.
Re claim 8 Xue and Magnus disclose the semiconductor package of claim 1, wherein each of the plurality of contact pads(1200) contains nickel and gold.
Re claim 9 Xue and Magnus disclose the semiconductor package of claim 1, wherein the semiconductor package is a common-drain metal-oxide-semiconductor field-effect transistor (MOSFET) chip scale package (CSP) for battery protection application; wherein two gates and a plurality of sources are on a front surface of the common-drain MOSFET CSP; and wherein a common-drain is on a back surface of the common-drain MOSFET CSP[0004].
Conclusion
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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