DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-14 and 18-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites a processor comprising one or more circuit “to perform” an API. This language is indefinite because it does not specifically limit the processors in a manner that executes the functions, and may be interpreted as a statement of intended use. A statement of intended use may be interpreted as non-limiting. It is therefore unclear whether a circuit “to perform” a function refers to a specific circuit to perform the function (i.e., configured or programmed for the function) or a generic circuit that may be used to perform the function. The same reasoning may be applied to other instances with similar language (e.g., “the API is to identify” as in claim 2). Claim 8 is also rejected on this basis.
Claim 2 recites “one or more processors” in line 2. This limitation is indefinite because it is unclear whether it is a reference to “one or more processors” originally recited in claim 1, or is establishing a different set of one or more processors.
Claim 7 recites “one or more clock frequencies” in lines 2-3. This limitation is indefinite because it is unclear whether it is a reference to “one or more clock frequencies” originally recited in claim 1, or is establishing a different set of one or more clock frequencies. Claims 11 and 18-20 are rejected on the same basis.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 7-11, 15-18, and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Srinivasan et al., U.S. Patent Application Publication No. 2019/0384348. Srinivasan was cited by the Applicant in the IDS filed on 24 October 2025.
Regarding claim 1, Srinivasan discloses a processor comprising:
one or more circuits to perform an application programming interface (API) [Fig. 2B, step 236: OS/VMM uses API to set CPU usage scenario] to identify one or more settings to be used to configure one or more processors to be configured to operate at one or more processor clock frequencies [step 238: base clock frequency] based, at least in part, on one or more inputs to the API [step 234, 235: usage scenarios].
Regarding claim 2, Srinivasan discloses that the one or more inputs comprise one or more indications of one or more processor target metrics to be used by one or more processors when performing one or more instructions [para. 0020: “A usage scenario may be specified by a set of parameters including, for example, a target number of processing cores in the processor to be used, a target thermal design power (TDP) quantity, a target workload (e.g., as a percentage of the TDP), and a target reliability measurement (e.g., useful life of the processor).”].
Regarding claim 3, Srinivasan discloses that the one or more inputs comprise one or more indications of a software workload to be performed by the one or more processors [para. 0020: “….a target workload (e.g., as a percentage of the TDP)…”].
Regarding claim 4, Srinivasan discloses that the one or more circuits are to perform the API to configure the one or more processors to operate at the one or more processor clock frequencies is based, at least in part, on one or more observed processor performance metrics [para. 0041: “…system software 122 may determine whether the current service level… satisfies a customer's request and if not, the conditions to satisfy the customer's request.”].
Regarding claim 7, Srinivasan discloses that the API is to cause the one or more processors to be configured to operate at one or more clock frequencies to perform one or more instructions in a data center [para. 0094: “…the machine may be connected (e.g., networked) to other machines in a LAN, an intranet, an extranet, or the Internet. The machine may operate in the capacity of a server or a client device in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment... Further, while only a single machine is illustrated, the term “machine” shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein.”].
Claim 8 is rejected on the same basis as claim 1.
Regarding claim 9, Srinivasan teaches that the one or more inputs comprise one or more indications of a processor performance preference [para. 0020: “Embodiments may include a user interface that may provide a user with the options to choose a target usage scenario from a list of usage scenarios.”].
Regarding claim 10, Srinivasan teaches that the one or more inputs comprise one or more indications of a job [para. 0020: target workload].
Regarding claim 11, Srinivasan discloses that the one or more circuits are to perform the API to configure the one or more processors to operate at the one or more processor clock frequencies is based, at least in part, on one or more processor performance metrics generated while the one or more processors perform one or more sets of instructions [para. 0041: “…system software 122 may determine whether the current service level… satisfies a customer's request and if not, the conditions to satisfy the customer's request.”].
Claim 15 is rejected on the same basis as claim 1.
Regarding claim 16, Srinivasan teaches that he one or more inputs comprise one or more indications of a processor settings profile [para. 0020: usage scenario].
Regarding claim 17, Srinivasan teaches that the one or more inputs comprise one or more indications of a set of instructions [para. 0020: target workload].
Regarding claim 18, Srinivasan discloses performing the API to configure the one or more processors to operate at the one or more processor clock frequencies is based, at least in part, on one or more processor performance metrics generated while the one or more processors perform one or more sets of instructions [para. 0041: “…system software 122 may determine whether the current service level… satisfies a customer's request and if not, the conditions to satisfy the customer's request.”].
Regarding claim 20, Srinivasan teaches performing the API to cause the one or more processors to be configured to operate at one or more clock frequencies based, at least in part, on scheduling one or more sets of instructions to be performed by the one or more processors [para. 0053: scheduler units].
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5, 8, 12, 15, and 19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Ganor et al., U.S. Patent Application Publication No. 2024/0211321.
Regarding claims 1 and 5, Ganor discloses a processor comprising:
one or more circuits to perform an application programming interface (API) [para. 0025: “…a user accessible API…”] to cause one or more processors to be configured to operate at one or more clock frequencies [para. 0028: “A DPU may initially power-up with a default configuration for one or more processing and/or memory resources. The ATF may read the configuration file, as adjusted by the user through the API, from a Bfb init file to determine the power consumption limit and/or the thermal limit for the DPU (where 0 means no power consumption limit and/or no thermal limit). Thereafter, the configuration is sanitized so that the DPU cannot exceed one or more of the limits in the configuration file… The DPU may also configure the Arm clock phase locked loops (PLLs) to requested frequencies with or without facilitation by the NIC firmware.”]1 based, at least in part, on one or more inputs to the API [para. 0027: “…a user may use the API to set a 50 W maximum power consumption for a DPU… the user selected configuration may be written by the API as the non-volatile configuration file (e.g., stored on the DPU in a Bfb init file) that details specific DPU operating parameters required to achieve the user selected system budget.”],
wherein the one or more circuits are to perform the API to cause the one or more processors to be configured to operate based, at least in part, on a maximum operating voltage [para. 0046: “Operating parameters of the resources 212 that are controlled by the configuration file 208 may include… operating voltage (e.g., max operating voltage) of a processing resource…”].
Claims 15 and 19 are rejected on the same basis as claims 1 and 5.
Claim 8 is rejected on the same basis as claim 1.
Regarding claim 12, Ganor teaches that the one or more processors are to perform the API to cause the one or more processors to be configured to operate based, at least in part, on a maximum total graphics power [para. 0027: maximum power consumption; para. 0032: “Other non-limiting examples of processing circuits… a Graphics Processing Unit (GPU)…”].
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Srinivasan in view of Artman et al., U.S. Patent Application Publication No. 2008/0278905. Artman was cited by the Examiner during prosecution of Application Nos. 18/632,267 and 18/632,260, and also by the Applicant in the IDS filed on 15 January 2026.
Regarding claim 13, Srinivasan discloses the system of claim 8, but does not teach a setting based on an algorithm used to set a fan setting.
Artman discloses an algorithm used to set a fan setting [Fig. 6: changing fan speed based on state information].
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the teachings of Srinivasan and Artman by modifying Srinivasan to use an algorithm to set a fan setting as taught by Artman. Srinivasan teaches that a usage scenario may consider a target thermal design point as a constraint for heat generated by the system [para. 0031: “…the thermal energy generated by various applications running on processor 102 and may adjust the processor workload to ensure the generated thermal energy does not violate the TDP associated with processor 102…”]. However, Srinivasan is silent regarding cooling features. Artman discloses a fan that provides a cooling function in a computing system that uses an algorithm to set a fan speed. Artman further teaches that an idling fan speed may be determined based on a processor TDP. It would therefore have been obvious to one of ordinary skill in the art to apply the teachings of Artman to Srinivasan based on Srinivasan’s teachings of a target TDP, and Artman’s teaching that a fan may be used to cool the system [para. 0027] and that TDP may be used to determine the idling fan speed.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Application claims 1, 3, 7, 8, 10, 15, 17, and 20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 3, 7, 8, 9, 10, and 15-17 of U.S. Patent Application No. 18/632,270.
Application claims 1-4, 6-11, 13-18 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-4, 7-10, 13-17 of U.S. Patent Application Publication No. 18/632,260.
Application claims 1, 8, and 15 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 8, 15 of U.S. Patent Application Publication No. 18/632,274.
Application claims 1, 8, and 15 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 8, and 15 of U.S. Patent Application Publication No. 18/615,470.
Application claims 1-4, 7, 8, 10, 11, 15, 17, and 18 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent Application Publication No. 18/632,267.
Although the claims at issue are not identical, they are not patentably distinct from each other because the application claims are anticipated by the reference claims. Because they application claims are broader in comparison to the reference claims, this allows the application claims to be anticipated by the reference claims in the same manner as if they were treated as a prior art reference. In other cases, the application claims represent obvious variants of the reference claim language (e.g., application claim 10 recites a “job” whereas reference claims recite a “software workload”). The application claims are anticipated by the reference claims in the following manner.
Present Application
‘270 Application
1
1
3
9, 10
7
7
8
8
10
9, 10
15
15
17
9, 10
20
3, 17
Present Application
‘260 Application
1
1
2
3
3
3
4
3
6
4
7
7
8
8
9
9, 16
10
10, 17
11
17
13
4, 14
14
13
15
15
16
2, 9
17
3, 10, 17
18
3, 10, 17
Present Application
‘274 Application
1
1
8
8
15
15
Present Application
‘470 Application
1
1
8
8
15
15
Present Application
‘267 Application
1
1
2
3
3
1-7
4
3
7
19
8
8
10
8-14
11
10
15
15
17
15-20
18
17
The rejection of the application claims is a provisional rejection because the patentably indistinct claims have not in fact been patented. The Examiner notes that the ‘270, ‘260, and ‘274 applications have been allowed but have not yet issued as patents.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Yeung et al., U.S. Patent Application Publication No. 2010/0097149, discloses one or more processors comprising:
one or more circuits to perform an application programming interface (API) [para. 0031: “…a driver for an application programming interface (API) can be included in the ROM to allow a user to provide…”] to cause one or more processors to be configured [Fig. 1 and 2: frequency selection 210 provided to PLL 202, which provides PLL clock to IC 102] to operate at one or more clock frequencies [para. 0030: “…frequency selector 206 can receive estimated frequency 208 and select from among predetermined frequencies stored in memory 214 a closest frequency to send to PLL 202 via signal 210.”]2 based, at least in part, on one or more inputs to the API [para. 0031: “…explicit reference clock frequency information via a host interface…”].
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JI H BAE whose telephone number is (571)272-7181. The examiner can normally be reached Tuesday to Friday and every other Monday, 9 am to 6 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jaweed Abbaszadeh can be reached at 571-270-1640. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JI H BAE/Primary Examiner, Art Unit 2176 U.S. Patent and Trademark Office
Phone: 571-272-7181
Fax: 571-273-7181
ji.bae@uspto.gov
1 Ganor’s disclosure indicates that the user provides a power consumption limit to an API which generates a configuration file associated with that limit and containing various settings, including processor frequencies. Upon subsequent reboot, the system reads the configuration file, identifies the power consumption limit, and re-configures the system according to the settings in the configuration file.
2 In the alternative embodiment discussed in para. 0031, the frequency selector employs the user-provided reference clock frequency information to select from the predetermined frequencies.
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