Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Remarks
The claim set listed on 06/22/2026 is invalid because it has belonged to the circuitry. It is confirmed by Applicant that we are going to use the claim set dated on 04/11/2026.
Election/Restrictions
Applicant’s election without traverse of Group II, Species A (Fig 14), including claims 1-13 in the reply filed on 06/22/2026 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 3 is/are rejected under 35 U.S.C. 102(a)(1)/(2) as being anticipated by SEO (Pub. No.: US 2012/0104424).
Re claim 1, SEO, Fig. 20 teaches a display device comprising:
a substrate (61);
a connection electrode (E1-E4, [0084]) on the substrate;
a light emitting element on the connection electrode and comprising a first semiconductor layer (29, ¶ [0089]), an active layer (27), and a second semiconductor layer (25) sequentially arranged in a third direction; and
an insulating layer (63, [0090]) covering the connection electrode (E1-E4) and the light emitting element, the insulating layer having openings spaced apart from each other and exposing the second semiconductor layer (25) of the light emitting element, and
wherein the second semiconductor layer (25) has a plurality of grooves corresponding to the openings in the insulating layer (63).
Re claim 3, SEO, Fig. 20 teaches the display device according to claim 1, wherein the plurality of grooves extends through a portion of the second semiconductor layer (25).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 3, 4 and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over by Lin (Pub. No.: US 2022/0029051) in view of WO 2023/036654 (hereinafter `654) filed in the IDS on 11/05/2024.
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Re claim 1, Lin, FIG. 1 [flip it upside down] teaches a display device comprising:
a substrate (1/E1/E2);
a connection (SR) electrode on the substrate;
a light emitting element on the connection electrode and comprising a first semiconductor layer (150, ¶ [0040]), an active layer (140), and a second semiconductor layer (130/120) sequentially arranged in a third direction; and
an insulating layer (110, [0022]) covering the connection electrode and the light emitting element, and
wherein the second semiconductor layer (130/120) has a plurality of grooves corresponding to the openings in the insulating layer (110).
Lin fails to teach the insulating layer having openings spaced apart from each other and exposing the second semiconductor layer of the light emitting element
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`654, Fig. 3C teaches the layer (135) having openings spaced apart from each other and exposing the second semiconductor layer (110) of the light emitting element
It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of enhancing the light emitting by the LED as taught by `654.
Moreover, after the combining of Lin and `654 would teach the insulating layer having openings spaced apart from each other and exposing the second semiconductor layer of the light emitting element.
Re claim 2, in the combination, `654, Fig. 3C teaches the display device according to claim 1, wherein each of the plurality of grooves (formed between 110) overlaps the openings (formed between 111) in a plan view (by looking down from the top).
Re claim 3, in the combination, Lin, FIG. 1 [flip it upside down] teaches the display device according to claim 1, wherein the plurality of grooves extends through a portion of the second semiconductor layer (130/120).
Re claim 4, in the combination, Lin, FIG. 1 [flip it upside down] teaches the display device according to claim 1, wherein the openings in the insulating layer and the plurality of grooves in the second semiconductor layer form a taper pattern (130/120).
However, the following limitation “concavo-convex pattern” had a little patentable weight because it has been held that where the only difference between the prior art and the claims was a recitation of relative size or shape of the claimed device, and a device having the claimed relative size or shape would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device (MPEP §2144.04) and it would have been obvious that a mere change in shape of a component is generally recognized as being within the level of ordinary skill in the art.
Re claim 12, in the combination, Lin, FIG. 1 [flip it upside down] teaches the display device according to claim 1, wherein an inner surface shape of each of the plurality of grooves is a taper shape (grooves of 130/120).
Re claim 13, in the combination, Lin, FIG. 1 [flip it upside down] teaches the display device according to claim 1, further comprising a conductive adhesive member (C1) between the connection electrode (SR) and the light emitting element (120/140/140/150).
Claim(s) 5-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over SEO in view of AKIMOTO (Pub. No.: US 2022/0069187).
Re claim 5, SEO teaches all the limitation of claim 1.
SEO fails to teach the limitation of claim 5.
AKIMOTO teaches a first transistor (103, FIG. 1, [0080]) on the substrate and spaced apart from the light emitting element (150) in a first direction crossing the third direction.
It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of including a circuitry to control the LED as taught by AKIMOTO.
Re claim 6, in the combination, SEO, Fig. 20 teaches the display device according to claim 5, further comprising:
a first pixel electrode (E1-E4) on the insulating layer (63) and electrically connected to the first semiconductor layer (29) of the light emitting element through the connection electrode; and
a second pixel electrode (65),
wherein the insulating layer (63) has a contact opening exposing the second semiconductor layer (25) in which the plurality of grooves are not formed, and
wherein the second pixel electrode (65) is electrically connected to the second semiconductor layer of the light emitting element through the contact opening.
Re claim 7, in the combination, AKIMOTO, FIG. 1 teaches the display device according to claim 6, wherein the first pixel electrode (110s, [0087]) is between the first transistor (103) and the light emitting element (150).
Re claim 8, in the combination, AKIMOTO, FIG. 23 teaches the display device according to claim 6, wherein the first pixel electrode (right 430k) does not overlap the light emitting element in a plan view, and SEO, Fig. 20 teaches wherein the second pixel electrode (65) is on the insulating layer (63) and covers at least one side surface of the light emitting element.
Re claim 9, in the combination, AKIMOTO, FIG. 23 teaches the display device according to claim 5, further comprising a second power line (right 110d) on the same layer as the connection electrode (left 110s) and to which second driving power is applied.
Re claim 10, in the combination, AKIMOTO, FIG. 23 teaches the display device according to claim 9, further comprising: a first via layer (right 115k) covering the first transistor (103) and the second power line (right 110d); and a second conductive pattern (right 430k) on the first via layer and connected to the first transistor.
Allowable Subject Matter
Claim 11 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance:
In the claim 11 that is written, the prior arts fail to show or fairly suggest the process steps of: “a second via layer on the first via layer and covering the second conductive pattern; and a third conductive pattern on the second via layer, wherein the third conductive pattern comprises a first power line to which first driving power is applied” in context with the other limitation as stated in claims 1, 5, 9 and 10.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONY TRAN whose telephone number is (571)270-1749. The examiner can normally be reached Monday-Friday, 8AM-5PM, EST.
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/TONY TRAN/Primary Examiner, Art Unit 2893
