Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A in the reply filed on 8/26/26 is acknowledged. The traversal is on the ground(s) that the species are not independent and distinct and a serious burden has not been shown. This is not found persuasive because there are several device features that change between the species causing the species to be independent and distinct, leading to a serious search burden. For example, species A has a gate trench and trench shielding region with the same profile including the region of non-uniform length that extends within and past the borders of the conductive taps. Other embodiments include different profiles for the non-uniform region in addition to the non-uniform region overlapping or not overlapping with the conductive tap. Additionally, species may also have a gate trench and gate shielding region with different profiles. The embodiments presented comprise all these possible different attributes of features causing independent and distinct species which create a serious burden to search.
The requirement is still deemed proper and is therefore made FINAL.
Claims 5-6, 20, and 23 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 8/26/26.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 7-19, 21-22 and 24-25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Luo et al. CN117334742.
Claim 1: Luo teaches (Fig. 3, 5, 6-7) a semiconductor device, comprising: a semiconductor layer structure comprising a drift region (114) of a first conductivity type, a well region (112) of a second conductivity type on the drift region, and a source region (140) of the first conductivity type on the well region; a gate trench (122,124) in the semiconductor layer structure, the gate trench extending in a first direction parallel to an upper surface of the semiconductor layer structure; and a trench shielding region (134/132) in the semiconductor layer structure beneath a bottom of the gate trench, wherein the gate trench comprises a first portion having a uniform width in a third direction, parallel to the upper surface of the semiconductor layer structure and perpendicular to the first direction, at a first depth in a second direction perpendicular to the upper surface of the semiconductor layer structure and a second portion having a non-uniform width in the third direction at the first depth (Fig. 6,7).
Claim 2: Luo teaches (Fig. 3, 5, 6-7) at least one conductive tap (112) extending in the semiconductor layer structure in the second direction and electrically connected to the source region (140,150) and to the trench shielding region (132/134).
Claim 3: Luo teaches (Fig. 3, 5, 6-7) the second portion of the gate trench is proximate the at least one conductive tap.
Claim 4: Luo teaches (Fig. 6-7) the width in the third direction of the second portion of the gate trench decreases linearly from an end of the first portion of the gate trench to a region overlapped by the at least one conductive tap in the second direction.
Claim 7: Luo teaches (Fig. 3, 5, 6-7) the second portion of the gate trench is disposed at an electrical connection point between the at least one conductive tap and the trench shielding region.
Claim 8: Luo teaches (Fig. 18-19) a second JFET region adjacent the first JFET region.
Claim 9: Luo teaches (Fig. 18-19) the second JFET region overlaps the second portion of the gate trench in the second direction.
Claim 10: Luo teaches (Fig. 18-19) a bottom surface of the second JFET region extends deeper in the second direction into the semiconductor layer structure than a bottom surface of the trench shielding region, relative to the upper surface of semiconductor layer structure.
Claim 11: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region has the second conductivity type.
Claim 12: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region comprises a first portion having a uniform width in the third direction at a second first depth in the second direction and a second portion having a non-uniform width in the third direction at the second depth.
Claim 13: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region has a varying width in the third direction that matches a varying width in the third direction of a bottom of the gate trench.
Claim 14: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region overlaps the gate trench in the second direction.
Claim 15: Luo teaches (Fig. 3, 5, 6-7) (see claim 1) semiconductor device, comprising: a semiconductor layer structure comprising a drift region; a gate trench in the semiconductor layer structure, the gate trench extending in a first direction parallel to an upper surface of the semiconductor layer structure; and a trench shielding region in the semiconductor layer structure beneath a bottom of the gate trench, the trench shielding region comprising a first portion having a uniform width in a third direction, parallel to the upper surface of the semiconductor layer structure and perpendicular to the first direction, at a first depth in a second direction perpendicular to the upper surface of the semiconductor layer structure and a second portion having a non-uniform width in the third direction at the first depth in the second direction.
Claim 16: Luo teaches (Fig. 3, 5, 6-7) at least one conductive tap extending in the semiconductor layer structure in a second direction perpendicular to the upper surface of the semiconductor layer structure and electrically connected to the trench shielding region.
Claim 17: Luo teaches (Fig. 3, 5, 6-7) the second portion of the trench shielding region is proximate the at least one conductive tap.
Claim 18: Luo teaches (Fig. 3, 5, 6-7) (Page 9) the drift region is of a first conductivity type, wherein the semiconductor layer structure comprises a well region of a second conductivity type on the drift region and a source region of the first conductivity type on the well region, and wherein the trench shielding region is electrically connected to the source region via the at least one conductive tap.
Claim 19: Luo teaches (Fig. 3, 5, 6-7) the gate trench comprises a first portion having a uniform width in the third direction and a second portion having a non-uniform width in the third direction, and wherein the second portion of the gate trench is disposed proximate an electrical connection point between the at least one conductive tap and the trench shielding region.
Claim 21: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region has a varying width in the third direction that matches a varying width in the third direction of the bottom of the gate trench.
Claim 22: Luo teaches (Fig. 3, 5, 6-7) a profile of the trench shielding region matches a profile of the bottom of the gate trench when viewed in plan view.
Claim 24: Luo teaches (Fig. 3, 5, 6-7) the drift region comprises a first region having a first doping concentration level (132) and a second region (134) laterally adjacent to the first region and having a second doping concentration level that is higher than the first doping concentration level, the first portion of the trench shielding region being in the first region of the drift region and the second portion of the trench shielding region being in the second region of the drift region (Page 11).
Claim 25: Luo teaches (Fig. 3, 5, 6-7) the trench shielding region overlaps the gate trench in the second direction.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAH KATE SALERNO whose telephone number is (571)270-1266. The examiner can normally be reached M-F 6:30am-2:30pm.
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/SARAH K SALERNO/Primary Examiner, Art Unit 2814
