DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to applicant’s Restriction/Election filed on 07/17/2026.
Currently claims 9-23 are pending in the application.
Election/Restrictions
Applicant's election without traverse of Species B, claims 9-20, in the reply filed on 07/17/2026 is acknowledged. Claims 21–23 have been newly added and the examiner accepted them for prosecution.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 04/17/2024 and 10/15/2024 were filed before the mailing date of the office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements were considered by the examiner.
Claim Rejections - 35 USC § 112 (b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 10-11 are rejected under 35 U.S.C. 112 (b), as being indefinite for failing to particularly pointing out and distinctly claim the subject matter which the inventor or a joint inventor, regard as their invention.
Regarding claim 10, the claim recites “removing an insulating material filling present within the channel before coating” (claim 10, lines 1–2). Claim 9, from which claim 10 depends, recites “forming a channel extending across each elongated connecting bar” and “coating an insulating material layer on the bottom surface of the channel,” but does not establish any “insulating material filling” present within the channel. It is therefore unclear whether the recited “insulating material filling” is the same material as, or is distinct from, the “insulating material layer” of claim 9, and at what stage of the method the filling comes to be “present within the channel.” There is insufficient antecedent basis for this limitation in the claim, and the metes and bounds of the claim are rendered unclear. Clarification and/or correction are/is required. For the purpose of examination, the claim will be interpreted according to the specification, which shows the channel being filled with insulating material that is thereafter partially removed so as to leave a thinner insulating material layer on the bottom surface of the channel while the sidewall surfaces remain exposed (see Figs. 4-5B; [0058]).
Regarding claim 11, the claim recites “said insulating material filling present within the channel has a thickness which is greater than a thickness of the insulating material layer.” Because claim 10 requires the “insulating material filling” to be removed “before coating,” the structural and temporal relationship on which the recited thickness comparison depends is unclear, rendering the claim indefinite for the same reasons set forth above with respect to claim 10. For the purpose of examination, the claim will be interpreted consistently with the specification as set forth above.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 9, 12-14, 16, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0293498 A1 (Fontana) and further in view of US 2014/0001616 A1 (Daniels).
Regarding claim 9, Fontana discloses, a method of manufacturing semiconductor devices (Fig. 14A – 14L; [0070] – [0084]), comprising:
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arranging a plurality of semiconductor dice (14; semiconductor dice; Figs. 4-5; [0051] - [0053]) onto a first surface of a common electrically conductive substrate (12; lead frame; Fontana discloses chips or dice 14 attached on the die pads 12A of a first surface of a lead frame 12),
wherein the common electrically conductive substrate (12; lead frame; Figs. 4-5; [0051] – [0053]) has a second surface (bottom) opposite the first surface (top) and comprises a plurality of substrate portions and elongated connecting bars extending between adjacent substrate portions (Fontana discloses an electrically conductive leadframe 12 having leads 12B and processed simultaneously for plural devices 10 that are later separated by singulation (Figs. 2, 14).
Note: To the extent Fontana does not expressly detail the elongated connecting bars between adjacent device sites, see Daniels below.
encapsulating the plurality of semiconductor dice (14) and the common electrically conductive substrate (12) in a molding compound (18; insulating encapsulation; Fig. 11; [0053]);
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forming a channel (12C) extending across each elongated connecting bar (12B), said channel including a bottom surface and sidewall surfaces (Fontana discloses forming a half cut 12C at the leadframe; Fig. 14H; the half cut defining a bottom surface and sidewall surfaces). Note: See also Daniels (partially-etched elongated depression 130) below.
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coating an insulating material layer (1200) on the bottom surface of the channel (12C) at each elongated connecting bar (12B) while leaving the sidewall surfaces of the channel (12C) at each elongated connecting bar (12B) exposed (Fig. 14H; [0073] – [0084]; Fontana discloses dispensing an insulating material 1200 at the leadframe);
Note: Fontana does not expressly state that the insulating material is coated on the bottom surface of the channel while leaving the sidewall surfaces exposed for plating; this difference is addressed under the motivation to combine below.
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providing a solder material (120C; Fig. 14I; [0081]) on the exposed sidewall surfaces of the channel at each elongated connecting bar (12B) (Fontana discloses tin plating at 120C on the exposed lead surfaces to provide solder-wettable lead flanks);
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providing singulated individual semiconductor devices (10) by cutting through the molding compound and the elongated connecting bars at the bottom surface of the channel at each elongated connecting bar coated by the insulating material layer (Fig. 14K; [0083]; Fontana discloses singulation with a blade B through the cut region to form individual QFN packages 10 having solder-wettable lead flanks).
But Fontana fails to teach explicitly, the substrate comprises a plurality of substrate portions interconnected by elongated connecting bars with the channel extending across each connecting bar; coating the insulating material layer on the bottom surface of the channel while leaving the sidewall surfaces exposed and cutting through the connecting bar at the insulated bottom of the channel; and the singulation blade is narrower than the channel.
However, in analogous art, Daniels discloses, a method of forming semiconductor device packages that improves saw singulation quality and wettability of leadframe packages (Fig. 1; [0033]), comprising:
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a lead frame strip (110) having a plurality of lead frames (112) interconnected by an elongated common bar (132; an elongated connecting bar) common to adjacent lead frames, and partially-etched elongated depressions (130; a channel) extending across the common bar (132), the opposite end portions of the depressions later forming plated wettable-flank recesses (134) at the ends of the juxtaposed leads (Figs. 1-4; [0041] – [0044]);
at least partially filling the depression (130) with a material (400; Fig. 4; [0038]) which may be a removable material 300 that is removed after singulation; and
saw singulating along a saw street (S; Fig. 1; [0043] – [0044]) extending along the common bar (132) with a blade whose width is such that the saw street does not include the opposed end portions of the depression (130; i.e., a blade narrower than the channel), the blade cutting through and reducing the common bar (132) to swarf together with the mold compound to separate the packages.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Fontana and Daniels before him/her, to form the lead frame of Fontana as a strip having substrate portions interconnected by elongated connecting bars and to include a channel extending across each connecting bar as taught by Daniels, and to provide the insulating material of Fontana on the bottom surface of that channel and to singulate with a blade narrower than the channel through the insulated bottom, in order to prevent the formation and accumulation of solder/metal burrs, flakes, and saw debris (filaments) at the cut and thereby reduce the risk of bridging or shorts between adjacent leads and reduce visual rejects, as expressly taught by Daniels, while preserving the solder-wettable flanks of Fontana. Such a combination merely unites prior-art elements according to known methods to yield the predictable result of cleaner singulation with preserved wettable flanks, and a person of ordinary skill would have had a reasonable expectation of success given that both Fontana and Daniels concern QFN-type lead frame packages with plated wettable flanks (see KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); MPEP 2143).
Regarding claim 12, the combination of Fontana and Daniels teaches, the method of claim 9, wherein the insulating material layer is a heat curable insulating material (Fig. 14; [0062]; Fontana discloses that polymerization (curing) of the insulating material 1200 is completed at an elevated temperature (e.g., about 170°C) together with curing of the encapsulation 18, i.e., the material is heat curable).
Regarding claim 13, the combination of Fontana and Daniels teaches, the method of claim 9, wherein the solder material comprises tin (Fig. 14I; [0081]; Fontana discloses tin plating at 120C on the exposed lead surfaces).
Regarding claim 14, the combination of Fontana and Daniels teaches, the method of claim 9, wherein coating the insulating material layer comprises providing the insulating material layer on the bottom surface via dispensing (Fig. 14C; [0075]; Fontana discloses that the insulating material 1200 is dispensed at the lead frame).
Regarding claim 16, the combination of Fontana and Daniels teaches, the method of claim 9, wherein said channel has a first width and wherein providing singulated individual semiconductor devices by cutting comprises cutting with a blade having a second width less than the first width (Fig. 1; [0043] – [0044]; Daniels Ref.). Daniels expressly discloses that the width of the saw blade is such that the saw street S along the common bar 132 does not include the opposed end portions of the depression 130, the blade width (second width) is less than the width of the depression/channel (first width) - so that the end portions remain to form the plated wettable flanks.
Regarding claim 23, the combination of Fontana and Daniels teaches, the method of claim 9, wherein coating the insulating material layer comprises providing the insulating material layer on the bottom surface via jetting (Fig. 14G; [0079]; by jet printing; Daniels Ref.). Fontana discloses applying material via jet printing and it would have been obvious to jet the insulating material layer to obtain localized deposition on the bottom surface.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0293498 A1 (Fontana) and further in view of US 2014/0001616 A1 (Daniels) and further in view of “Laser-induced Forward Transfer: Fundamentals and Applications”, Adv. Mat. Tech., IDS Reference (Serra).
Regarding claim 15 , the combination of Fontana and Daniels teaches, the method of claim 9, wherein the insulating material layer on the bottom surface, the insulating material layer on the bottom surface, including by dispensing or jetting, but does not expressly teach, coating the insulating material layer via laser induced forward transfer (LIFT).
However, Serra discloses, laser induced forward transfer (LIFT) as an established, nozzle-free, digital direct-write technique for precisely transferring and depositing a broad range of materials from a donor film onto a receiver substrate (Pere Serra, “Laser-Induced Forward Transfer: Fundamentals and Applications,” Adv. Mat. Tech. 2018, 1800099).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Fontana, Daniels and Serra before him/her to deposit the insulating material of Fontana on the bottom surface of the channel and to include the teaching of coating by LIFT as taught by Serra since in MPEP 2143 (B), it is stated that “a simple substitution of one known material-deposition technique for another to obtain the predictable result of precise, localized deposition of the insulating material, with a reasonable expectation of success is obvious”.
Claims 17-19 and 21–22 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0293498 A1 (Fontana) in view of US 2014/0001616 A1 (Daniels).
Regarding claim 17, Fontana discloses, a method (Fig. 14A – 14L; [0070] – [0084]), comprising:
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encapsulating a lead frame (12; lead frame; Fig. 11; [0051] – [0053]) in a molding compound (18; insulating encapsulation; Fig. 11; [0053]);
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forming a channel (12C) extending across an elongated connecting bar interconnecting adjacent substrate portions of the leadframe (12), said channel including a bottom surface and sidewall surfaces (Fig. 14H; [0073] – [0084]; Fontana discloses forming a half cut 12C at the lead frame, the half cut defining a bottom surface and sidewall surfaces);
Note: To the extent Fontana does not expressly detail the elongated connecting bars between adjacent device sites, see Daniels below.
providing an insulating material layer (1200) covering the bottom surface of the channel (12C) at the elongated connecting bar while leaving the sidewall surfaces of the channel at the elongated connecting bar exposed;
Note: Fontana does not expressly state that the insulating material is coated on the bottom surface of the channel while leaving the sidewall surfaces exposed for plating; this difference is addressed under the motivation to combine below.
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coating a solder material (120C; Fig. 14I; [0081]) on the exposed sidewall surfaces of the channel (12C) at the elongated connecting bar; and
cutting through the molding compound (18) and the elongated connecting bar at the bottom surface of the channel (12C) covered by the insulating material layer to produce cut connecting bar portions each having an end surface with wettable flanks (Fig. 14K; [0083]; Fontana discloses singulation with a blade B through the cut region to form individual QFN packages 10 having solder-wettable lead flanks).
But Fontana fails to teach explicitly, the substrate comprises a plurality of substrate portions interconnected by elongated connecting bars with the channel extending across each connecting bar; coating the insulating material layer on the bottom surface of the channel while leaving the sidewall surfaces exposed and cutting through the connecting bar at the insulated bottom of the channel; and the singulation blade is narrower than the channel.
However, in analogous art, Daniels discloses, a method of forming semiconductor device packages that improves saw singulation quality and wettability of leadframe packages (Fig. 1; [0033]), comprising:
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a lead frame strip (110) having a plurality of lead frames (112) interconnected by an elongated common bar (132; an elongated connecting bar) common to adjacent lead frames, and partially-etched elongated depressions (130; a channel) extending across the common bar (132), the opposite end portions of the depressions later forming plated wettable-flank recesses (134) at the ends of the juxtaposed leads (Figs. 1-4; [0041] – [0044]);
at least partially filling the depression (130) with a material (400; Fig. 4; [0038]) which may be a removable material 300 that is removed after singulation; and
saw singulating along a saw street (S; Fig. 1; [0043] – [0044]) extending along the common bar (132) with a blade whose width is such that the saw street does not include the opposed end portions of the depression (130; i.e., a blade narrower than the channel), the blade cutting through and reducing the common bar (132) to swarf together with the mold compound to separate the packages.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Fontana and Daniels before him/her, to form the leadframe of Fontana as a strip having substrate portions interconnected by elongated connecting bars and to include a channel extending across each connecting bar as taught by Daniels, and to provide the insulating material of Fontana on the bottom surface of that channel and to singulate with a blade narrower than the channel through the insulated bottom, in order to prevent the formation and accumulation of solder/metal burrs, flakes, and saw debris (filaments) at the cut and thereby reduce the risk of bridging or shorts between adjacent leads and reduce visual rejects, as expressly taught by Daniels, while preserving the solder-wettable flanks of Fontana. Such a combination merely unites prior-art elements according to known methods to yield the predictable result of cleaner singulation with preserved wettable flanks, and a person of ordinary skill would have had a reasonable expectation of success given that both Fontana and Daniels concern QFN-type leadframe packages with plated wettable flanks (see KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398 (2007); MPEP 2143).
Regarding claim 18, the combination of Fontana and Daniels teaches, the method of claim 17, wherein the insulating material layer is a heat curable insulating material (Fig. 14; [0062]; Fontana discloses that polymerization (curing) of the insulating material 1200 is completed at an elevated temperature (e.g., about 170°C) together with curing of the encapsulation 18, i.e., the material is heat curable).
Regarding claim 19, the combination of Fontana and Daniels teaches, the method of claim 17, wherein coating the insulating material layer comprises providing the insulating material layer on the bottom surface via dispensing (Fig. 14C; [0075]; Fontana discloses that the insulating material 1200 is dispensed at the lead frame).
Regarding claim 21, the combination of Fontana and Daniels teaches, the method of claim 17, wherein said channel has a first width and wherein cutting through the molding compound comprises cutting with a blade having a second width less than the first width (Fig. 1; [0043] – [0044]; Daniels Ref.). Daniels expressly discloses that the width of the saw blade is such that the saw street S along the common bar 132 does not include the opposed end portions of the depression 130, the blade width (second width) is less than the width of the depression/channel (first width) - so that the end portions remain to form the plated wettable flanks.
Regarding claim 22, the combination of Fontana and Daniels teaches, the method of claim 17, wherein the insulating material layer is provided on the bottom surface via jetting (Fig. 14G; [0079]; by jet printing; Daniels Ref.). Fontana discloses applying material via jet printing and it would have been obvious to jet the insulating material layer to obtain localized deposition on the bottom surface.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0293498 A1 (Fontana) and further in view of US 2014/0001616 A1 (Daniels) and further in view of “Laser-induced Forward Transfer: Fundamentals and Applications”, Adv. Mat. Tech., IDS Reference (Serra).
Regarding claim 20, the combination of Fontana and Daniels teaches, the method of claim 17, wherein the insulating material layer on the bottom surface, but does not expressly teach, providing the insulating material layer via laser induced forward transfer (LIFT).
However, Serra discloses, laser induced forward transfer (LIFT) as an established, nozzle-free, digital direct-write technique for precisely transferring and depositing a broad range of materials from a donor film onto a receiver substrate (Pere Serra, “Laser-Induced Forward Transfer: Fundamentals and Applications,” Adv. Mat. Tech. 2018, 1800099).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention having the teachings of Fontana, Daniels and Serra before him/her to deposit the insulating material of Fontana on the bottom surface of the channel and to include the teaching of providing it by LIFT as taught by Serra since in MPEP 2143 (B), it is stated that “a simple substitution of one known material-deposition technique for another to obtain the predictable result of precise, localized deposition of the insulating material, with a reasonable expectation of success is obvious”.
Allowable Subject Matter
Claims 10-11 are objected to as being dependent upon a rejected base claim and as failing to comply with 35 U.S.C. 112(b), but would be allowable if the indefiniteness set forth above is resolved and the claims are rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 10, the closest prior art, US 2022/0293498 A1 (Fontana), in conjunction with US 2014/0001616 A1 (Daniels), fails to disclose, “the method of claim 9, further comprising removing an insulating material filling present within the channel before coating”, in combination with the additionally claimed features, as are claimed by the Applicant. Daniels teaches at least partially filling the entire depression with a material that either remains in place during singulation or is removed after singulation, but does not teach reducing an insulating filling to a thinner bottom-only layer prior to plating the exposed sidewalls; and Fontana confines plating using a separate water-soluble mask rather than a bottom-only insulating layer. This subject matter is material to the inventive concept of the application—namely, selectively insulating the future singulation line (the channel bottom) while preserving the exposed sidewalls for wettable-flank plating—so that substantially less plated solder material is removed during the final cut, thereby reducing the formation of flakes and filaments and the associated risk of shorting between adjacent leads.
Specifically, the aforementioned ‘removing an insulating material filling present within the channel before coating,’ is material to the inventive concept of the application at hand, to selectively insulate the future singulation line (the channel bottom) while preserving the exposed sidewalls for wettable-flank plating, so that substantially less plated solder material is removed during the final cut, thereby reducing the formation of flakes and filaments and the associated risk of shorting between adjacent leads.
Claim 11 is also objected to due to its dependence on an objected base claim.
Examiner’s Note (Additional Prior Arts)
The examiner included a few prior arts which were not used in the rejection but are relevant to the disclosure.
US 2016/0276251 A1 (Mustanir) - A method of producing wettable fillets in electronic packages is disclosed. A matrix of unsingulated lead frames is provided, each including a plurality of lead elements and a chip pad. Chips are attached to the chip pads and terminals on the chips are electrically connected to lead portions of the lead elements. The top portion of the package is encapsulated. Masking is applied to the bottom surface of the lead elements and the chip pads, but at least one of the lead elements has a portion of its surfaced remaining exposed. The exposed lead element surface is etched to create a fillet. The fillets, lead elements and bottom surface of the chip pads are plated, and the packages then singulated, producing packages with wettable flanks.
US 2022/0344173 A1 (Kovitsophon) - Flat no-leads integrated circuit (IC) packages are formed with solder wettable leadframe terminals. Dies are mounted on die attach pads, bonded to adjacent leadframe terminal structures, and encapsulated in a mold compound. A laser grooving process removes mold compound from a leadframe terminal groove extending along a row of leadframe terminal structures. A saw step cut along the leadframe terminal groove extends partially through the leadframe thickness to define a saw step cut groove. Exposed leadframe surfaces, including surfaces exposed by the saw step cut, are plated with a solder-enhancing material. A singulation cut is performed along the saw step cut groove to define leadframe terminals with end surfaces plated with the solder-enhancing material. The laser grooving process may improve the results of the saw step cut, and the saw step cut may remove mold compound not removed by the laser grooving process.
US 2005/0116321 A1 (Li) - Methods of fabricating leadless packages are described that provide good solder joint reliability. In most respects, the packages are fabricated in a manner similar to current lead frame based leadless packaging techniques. However, at some point in the process, the contacts are provided with undercut regions that are left exposed during solder plating so that the solder plating also covers the exposed side and undercut segments of the contacts. When the resultant devices are soldered to an appropriate substrate (after singulation), each resulting solder joint includes a fillet that adheres very well to the undercut portion of contact. This provides a high quality solder joint that can be visually inspected from the side of the package.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to S M SOHEL IMTIAZ whose telephone number is (408) 918-7566. The examiner can normally be reached on 8AM-5PM, M-F, PST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/S M SOHEL IMTIAZ/Primary Patent Examiner
Art Unit 2812
07/29/2026
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