Prosecution Insights
Last updated: July 17, 2026
Application No. 18/638,530

FLEXIBLE DISPLAY AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §112
Filed
Apr 17, 2024
Priority
Aug 03, 2010 — RE 10-2010-0074979 +3 more
Examiner
RAMPERSAUD, PRIYA M
Art Unit
1787
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
207 granted / 292 resolved
+5.9% vs TC avg
Strong +28% interview lift
Without
With
+28.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
12 currently pending
Career history
305
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
79.7%
+39.7% vs TC avg
§102
12.2%
-27.8% vs TC avg
§112
5.0%
-35.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 292 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 04/17/2024 and 05/02/2024 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 2-14, 16, 19-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-3, 5-12, 14-17 of U.S. Patent No. US 11,978,803 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims application 18/638,530 are broader than that of US 11,978,803 B2. PNG media_image1.png 335 214 media_image1.png Greyscale Claim 15, 17 and 18 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 7, 14 of U.S. Patent No. US 11,978,803 B2 in view of Lee et al. [US 2011/0193067 A1], “Lee”. Regarding claim 15, US 11,978,803 B2 discloses claim 14, US 11,978,803 B2 does not a thickness of the third silicon nitride layer is less than the thickness of the first silicon oxide layer and the thickness of the second silicon oxide layer. However, Lee discloses the silicon nitride layer has a thickness ranging from about 20 nm to about 80 nm and the silicon oxide layer has a thickness ranging from about 100 nm to about 500 nm. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to adjust the thickness of the silicon oxide layer and silicon nitride layer as taught in Lee in the device of US 11,978,803 B2 such that a thickness of the third silicon nitride layer is less than the thickness of the first silicon oxide layer and the thickness of the second silicon oxide layer because such a modification would adjusting the thickness of the layers would prevent the penetration of external impurities (¶[0008] of Lee). It has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Regarding claim 17, US 11,978,803 B2 discloses claim 14, US 11,978,803 B2 does not a thickness of the first silicon nitride encapsulating layer is less than a thickness of the first silicon oxide encapsulating layer and a thickness of the second silicon oxide encapsulating layer. However, Lee discloses the silicon nitride layer has a thickness ranging from about 20 nm to about 80 nm and the silicon oxide layer has a thickness ranging from about 100 nm to about 500 nm. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to adjust the thickness of the silicon oxide layer and silicon nitride layer as taught in Lee in the device of US 11,978,803 B2 such that a thickness of the first silicon nitride encapsulating layer is less than a thickness of the first silicon oxide encapsulating layer and a thickness of the second silicon oxide encapsulating layer because such a modification would adjusting the thickness of the layers would prevent the penetration of external impurities (¶[0008] of Lee). It has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Regarding claim 18, US 11,978,803 B2 discloses claim 16, US 11,978,803 B2 does not the thickness of the first silicon nitride encapsulating layer is from about 200 A to about 1000 A and the thickness of each of the first silicon oxide encapsulating layer and the second silicon oxide encapsulating layer is from about 1000 A to about 3000 A. However, Lee discloses the silicon nitride layer has a thickness ranging from about 20 nm to about 80 nm and the silicon oxide layer has a thickness ranging from about 100 nm to about 500 nm. Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to adjust the thickness of the silicon oxide layer and silicon nitride layer as taught in Lee in the device of US 11,978,803 B2 such that the thickness of the first silicon nitride encapsulating layer is from about 200 A to about 1000 A and the thickness of each of the first silicon oxide encapsulating layer and the second silicon oxide encapsulating layer is from about 1000 A to about 3000 A because such a modification would adjusting the thickness of the layers would prevent the penetration of external impurities (¶[0008] of Lee). It has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 6 recites the limitation "flexible substrate". There is insufficient antecedent basis for this limitation in the claim. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee et al. [US 2011/0193067 A1] discloses an organic light-emitting device including a barrier layer that includes a silicon oxide layer and a silicon-rich silicon nitride layer. Lee does not disclose a stress of the barrier layer is in a range of -200 MPa to 200 MPa that is a sum of stresses of the first and second silicon oxide layers and the first silicon nitride layer. Yamazaki et al. [US 6,380,558 B1] disclose a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having tensile stress on a substrate, tensile stress is given to the first insulating layer formed to be in close contact with a surface of the semiconductor layer at a substrate side, and compressive stress is given to the second insulating layer formed to be in close contact with a surface of the semiconductor layer at a side opposite to the substrate side. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRIYA M RAMPERSAUD whose telephone number is (571)272-3464. The examiner can normally be reached Mon-Wed 9am-6pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at (571)270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. PRIYA M. RAMPERSAUD Examiner Art Unit 2897 /PRIYA M RAMPERSAUD/Examiner, Art Unit 2897
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Prosecution Timeline

Apr 17, 2024
Application Filed
Jun 17, 2024
Response after Non-Final Action
Jun 03, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
99%
With Interview (+28.4%)
2y 11m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 292 resolved cases by this examiner. Grant probability derived from career allowance rate.

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