CTNF 18/640,194 CTNF 79692 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1-20 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Shah et al., US Patent Application Publication no. 2022/0413452 [Shah] 1 . Regarding claims 1 and 14, Shah discloses a self-conditioning substrate processing chamber, comprising: a processing chamber for processing substrates [ semiconductor manufacturing process chamber, paragraph 0028 ]; a heating element configured to heat the chamber and allow the chamber to cool [ substrate heating and cooling processes, paragraphs 0028 and 0053 ]; one or more temperature measurement devices for measuring the temperature associated with the processing chamber [ sensors that measure temperature, paragraph 0029 ]; and a computing device capable of: determining a high chamber temperature value and a low chamber temperature value based on measuring temperatures associated with the chamber [ determining a target heating temperature and a target cooling temperature, paragraph 0053 ], wherein: the high chamber temperature value is determined based on detecting a peak temperature value associated with the chamber during substrate processing [ updated process recipe settings including chamber temperature heating and cooling settings are determined using a machine learning model, paragraphs 0028 and 0108-0110 ]; and the low chamber temperature value is determined based on detecting a minimum temperature value associated with the chamber during the substrate processing [ updated process recipe settings including chamber temperature heating and cooling settings are determined using a machine learning model, paragraphs 0028 and 0108-0110 ]; causing the heating element to heat the chamber until a detected temperature associated with the chamber reaches the high chamber temperature value [ the chamber temperature control processes are performed based on the updated process recipe settings, paragraphs 0028, 0053 and 0112 ]; and causing the heating element to let the chamber cool until a corresponding detected temperature associated with the chamber reaches the low chamber temperature value [ the chamber temperature control processes are performed based on the updated process recipe settings, paragraphs 0028, 0053 and 0112 ]. Regarding claims 2 and 17, Shah further discloses that determining the high chamber temperature value and determining the low chamber temperature value are based on successively heating substrates in the chamber until temperature values associated with the chamber stay within a training threshold of variance [ historical temperature data is used to determine updated process recipe settings that achieve a target scratch profile, paragraphs 0023, 0035, 0091 and 0108-0110 ]. Regarding claims 3 and 18, Shah further discloses that determining the high chamber temperature value is based on a peak measured temperature value associated with the chamber that is within the training threshold of variance [ historical temperature data is used to determine updated process recipe settings that achieve a target scratch profile, paragraphs 0023, 0035, 0091 and 0108-0110 ]. Regarding claim 4, Shah further discloses that determining the low chamber temperature value is based on a minimum measured temperature value associated with the chamber that is within the training threshold of variance [ historical temperature data is used to determine updated process recipe settings that achieve a target scratch profile, paragraphs 0023, 0035, 0091 and 0108-0110 ]. Regarding claim 5, Shah further discloses that determining the high chamber temperature value and determining the low chamber temperature value are based on successively heating a given number of substrates in the chamber [ historical temperature data is from previously performed substrate processing (including heating), paragraphs 0023, 0035 and 0091 ]. Regarding claim 6, Shah further discloses that the high chamber temperature value is selected based on detecting a peak temperature value associated with the chamber in connection with processing a given number of substrates [ historical temperature data from previously performed substrate processing is used to determine updated process recipe settings that achieve a target scratch profile, paragraphs 0023, 0035, 0091 and 0108-0110 ]. Regarding claims 7 and 19, Shah further discloses that the low chamber temperature value is selected based on detecting a minimum temperature value associated with the chamber after a given number of substrates have been processed [ historical temperature data from previously performed substrate processing is used to determine updated process recipe settings that achieve a target scratch profile, paragraphs 0023, 0035, 0091 and 0108-0110 ]. Regarding claims 8 and 15, Shah further discloses that the heating and the cooling are repeated for a given number of iterations [ a process recipe defines the required heating and cooling processes, paragraph 0028 ]. Regarding claims 9 and 16, Shah further discloses that the heating and the cooling are repeated until detected temperature values associated with the chamber stay within a conditioning threshold of variance [ the substrate heating and cooling processes are performed until the substrate reaches a target temperature, paragraph 0053 ]. Regarding claim 10, Shah further discloses that the heating and the cooling are repeated until detected temperature values associated with the chamber stay within a conditioning threshold of variance [ the substrate heating and cooling processes are performed until the substrate reaches a target temperature, paragraph 0053 ]. Regarding claim 11, Shah further discloses that the heating and the cooling are repeated until a minimum detected temperature value associated with the chamber stays within the conditioning threshold of variance [ the substrate heating and cooling processes are performed until the substrate reaches a target temperature, paragraph 0053 ]. Regarding claims 12 and 20, Shah further discloses that a pressure value associated with the chamber is selected based on measuring a pressure inside the chamber when temperature values associated with the chamber remain within a given range, wherein the pressure of the chamber is set to the selected pressure value during the heating and the cooling [ process recipes include target temperature and pressure settings and sensors measure temperature and pressure values, paragraphs 0028, 0029 and 0034 ]. Regarding claim 13, Shah further discloses that the substrate processing is performed according to multiple substrate processing recipes, wherein a respective high chamber temperature value and a respective low chamber temperature value are determined for each recipe [ each process recipe has its own particular temperature settings, paragraphs 0028 and 0034 ] . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yoshida et al., US Patent Application Publication no. 2025/0301536 discloses using machine learning to control heating and cooling settings during semiconductor manufacturing processes. Nakatani et al., US Patent Application Publication no. 2025/0112063 discloses controlling heater settings during semiconductor manufacturing processes to achieve desired chamber temperature distributions. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL B YANCHUS III whose telephone number is (571)272-3678. The examiner can normally be reached Monday-Friday 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kamini Shah can be reached at (571) 272-2279. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAUL B YANCHUS III/Primary Examiner, Art Unit 2115 June 12, 2026 Application/Control Number: 18/640,194 Page 2 Art Unit: 2115 Application/Control Number: 18/640,194 Page 3 Art Unit: 2115 Application/Control Number: 18/640,194 Page 4 Art Unit: 2115 Application/Control Number: 18/640,194 Page 5 Art Unit: 2115 Application/Control Number: 18/640,194 Page 6 Art Unit: 2115 Application/Control Number: 18/640,194 Page 7 Art Unit: 2115 Application/Control Number: 18/640,194 Page 8 Art Unit: 2115 1 Shah was cited in the 7/22/25 IDS.
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