DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
In addressing the rejection ground, each claim may not have been separately discussed to the extent the claimed features are the same as or similar to the previously-discussed features; the previous discussion is construed to apply for the other claims in the same or similar way.
In the office action, “/” should be read as and/or as generally understood. For example, “A/B” means A and B, or A or B.
Election/Restrictions
Claim 16 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 10/01/2025.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Claim 14 recites “other components”. The drawing figures fails to show “at least one other components”.
Similarly, claim 1 recites “at least one other component”. The drawing figures fails to show “at least one other component”.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1 and 4-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Maya (US 2023/0007748).
Regarding claim 1, Maya discloses a bi-color control circuitry [e.g. 100 fig. 2/300 fig. 5 (see the corresponding elements)] in a storage device [see at least para. 0010], the bi-color control circuitry controls states of a bi-color light-emitting diode (LED) and includes materials used on other components in the storage device, the bi-color control circuitry comprises: a bi-color LED [e.g. LED1, LED2]; a first current limit resistor [R1/R2/R3/R4] and a second current limit resistor [R2/R3/R4/R1], the first current limit resistor and the second current limit resistor being different value resistors; and a first set of materials [e.g. Q1, Q2] contributing to one of turning on and turning off the states of the bi-color LED, wherein the first set of materials is used in at least one other component in the storage device and wherein the first set of materials, the first current limit resistor, and the second current limit resistor change the states of the bi-color LED according to a host signal [e.g. LED Pin A10] received by the bi-color control circuitry.
Regarding claim 4, Maya discloses the bi-color control circuitry of claim 1, wherein the values of the first current limit resistor and the second current limit resistor vary depending on a light requirement of the bi-color LED.
Regarding claim 5, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color control circuitry receives the host signal through an LED pin connector [e.g. LED_Pin A10] between a host and the storage device.
Regarding claim 6, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color LED is an amber LED [e.g. LED2, see para. 0023, LED2 can have amber color] and a blue LED [e.g. LED1], and when a high host signal is received by the bi-color control circuitry, the high host signal goes through the amber LED to ground, the amber LED turns into a forward state, and current flows through the first current limit resistor [e.g. R1].
Regarding claim 7, Maya discloses the bi-color control circuitry of claim 6, wherein the high host signal flows through a first MOSFET [e.g. X1 fig. 5], turns the first MOSFET on and the current passes through the first MOSFET, shorting a gate voltage of a second MOSFET [e.g. X2] and turning the second MOSFET to an off state to turn off the blue LED.
Regarding claim 8, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color LED is an amber LED [e.g. LED2, see para. 0023, LED2 can have amber color] and a blue LED [e.g. LED1], and when a low host signal is received by the bi-color control circuitry, no current flows to the amber LED and the amber LED is turned to an off state.
Regarding claim 9, Maya discloses the bi-color control circuitry of claim 8, wherein a gate of a first MOSFET [e.g. X1 fig. 5] gets the low host signal, turns off the first MOSFET so that no current flows to the first MOSFET, turns on a second MOSFET [e.g. X2], and moves the blue LED to a forward state, wherein current flows through the second current limit resistor [e.g. R1/R3/R4] and the blue LED.
Regarding claim 10, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color LED is an amber LED [e.g. LED2, see para. 0023, LED2 can have amber color] and a blue LED [e.g. LED1], and when no host signal is received by the bi-color control circuitry, current flowing through a first resistor [e.g. R1] and a second resistor [e.g. R2] is insufficient to turn on the amber LED.
Regarding claim 11, Maya discloses the bi-color control circuitry of claim 10, wherein the current turns on a first MOSFET [e.g. X2 fig. 5] and turns off a second MOSFET [e.g. X1] and the blue LED.
Regarding claim 12, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color LED is an amber LED [e.g. LED2, see para. 0023, LED2 can have amber color] and a blue LED [e.g. LED1] and the amber LED off and on states are independent of current flowing through the bi-color control circuitry.
Regarding claim 13, Maya discloses the bi-color control circuitry of claim 1, wherein the bi-color LED is an amber LED [e.g. LED2, see para. 0023, LED2 can have amber color] and a blue LED [e.g. LED1], and the blue LED is in an off state when current is not present in the bi-color control circuitry.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2-3 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Maya (US 2023/0007748).
Regarding claim 2, Maya discloses the bi-color control circuitry of claim 1, wherein the first set of materials includes a first metal-oxide-semiconductor field-effect transistor (MOSFET) [e.g. X1/X2], a second MOSFET [e.g. X2/X1], a first resistor [e.g. R3/R4/R1/R2], and a second resistor [e.g. R4/R3/R2/R1]. Maya does not disclose one resistor has the same value as another resistor. However, the resistance values are merely a design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first resistor and the second resistor having a same value because the circuit needs a specific implementation, or at least one of the resistors can be combined by multiple resistors having same resistance value or having same resistance value of another resistor because they are equivalent circuit having same resistance value (e.g. the resistance value of a resistor is combined by smaller values but the resistance value is not changed).
It’s suggested to recite more circuit structure of the bi-color control circuitry.
Regarding claim 3, Maya discloses the bi-color control circuitry of claim 1. Maya discloses the first current limit resistor is approximately 800 ohm [para. 0018], but Maya does not explicitly disclose the first current limit resistor is an 845-ohm resistor, and the second current limit resistor is a 130-ohm resistor. However, the resistance values are merely a design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first current limit resistor is an 845-ohm resistor, and the second current limit resistor is a 130-ohm resistor because the circuit needs a specific implementation, or at least one of the resistors can be combined by multiple resistors having an 845-ohm resistor and/or a 130-ohm resistor because they are equivalent circuit having same resistance value.
Regarding claim 14, Maya discloses a bi-color control circuitry in a storage device, the bi-color control circuitry controls states of a bi-color light-emitting diode (LED) including a first LED and a second LED [e.g. LED1, LED2] and the bi-color control circuitry includes materials used on other components [e.g. the component having the first set of materials and at least one of R1/R2/D3/R3/R4] in the storage device, the bi-color control circuitry comprises: a bi-color LED; a first current limit resistor and a second current limit resistor, the first current limit resistor and the second current limit resistor being different value resistors; and a first set of materials contributing to one of turning on and turning off the states of the bi-color LED, wherein the first set of materials is used in at least one other component in the storage device and the first set of materials includes a first metal-oxide-semiconductor field- effect transistor (MOSFET) [e.g. X1/X2], a second MOSFET [e.g. X2/X1], a first resistor [e.g. R3/R2/R4], and a second resistor [e.g. R4/R3/R2] placed between the second MOSFET and the first LED [e.g. LED1/LED2], wherein the first set of materials, the first current limit resistor, and the second current limit resistor change the states of the bi-color LED according to a host signal received by the bi-color control circuitry. See at least rejections of claims 1-2.
Maya does not disclose one resistor has the same value as another resistor. However, the resistance values are merely a design choice. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the first resistor and the second resistor having a same value because the circuit needs a specific implementation, or at least one of the resistors can be combined by multiple resistors having same resistance value or having same resistance value of another resistor because they are equivalent circuit having same resistance value.
Claim 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Maya (US 2023/0007748) in view of Gupta et al. (US 2020/0018782).
Regarding claim 15, Maya discloses the bi-color control circuitry of claim 14, except wherein the bi-color control circuitry uses different sized MOSFETs. Maya does not disclose X2 (or X1) can be a p-type MOSFET. However, it’s well-known to replace a n-type MOSFET with a p-type MOSFET, for example, Gupta discloses to replace a n-type MOSFET with a p-type MOSFET [para. 0058], such that the combination discloses the bi-color control circuitry uses different sized MOSFETs Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device disclosed by Maya in accordance with the teaching of Gupta regarding MOSFETs in order to utilize a well-known p-type MOSFET.
Response to Arguments
Applicant's arguments filed 02/17/2026 have been fully considered but they are not persuasive. Applicant argues:
‘Maya fails to teach or suggest that its transistors (Q1 and Q2) which the Office Action equates with the first set of materials are used in at least one other component in the storage device. FIG. 2 of the present application shows a first amber/blue bi-color control circuitry that is conventionally/currently used in a storage device. The control circuit shown in FIG. 2 of the present application is similar to the circuit shown in FIG. 2 of Maya. FIG. 3 of the present application also shows another amber/blue bi-color control circuitry that is conventionally/currently used in a storage device.
Paragraph 0022 of the present application also discloses that based on the specifications used to configure storage device 104, each of the materials (the common anode bi-color amber/blue LED, R1, R2, R3, R4, D3, Q1, and Q2) of first amber/blue bi-color control circuitry 200 (i.e., each of the materials used in the amber/blue bi-color control circuitry of FIG. 2) are not reused in other components of storage device 104, thus increasing the bill of materials (BOM) when first amber/blue bi-color control circuitry 200 is used in storage device 104. Paragraph 0023 of the present application also discloses that based on the specifications used to configure storage device 104, each of the materials (i.e., the common cathode bi-color amber/blue LED, R1, R2, R3, R4, R5, Q1, and Q2) of second amber/blue bi-color control circuitry 300 (i.e., each of the materials used in the amber/blue bi-color control circuitry of FIG. 3) are also not reused in other components of storage device 104, thus increasing the BOM when second amber/blue bi- color control circuitry 300 is used in storage device 104."
On the other hand, FIGS. 4 and 5 of the present application show a novel amber/blue bi- color control circuitry used in a storage device. The novel amber/blue bi-color control circuitry of FIGS. 4 and 5 show materials M1, M2, R1, and R2 (referred to herein as a first set of materials). According to the specifications used to configure components on storage device 104, the first set of materials are currently used in other components of storage device 104. See paragraphs 0024 and 0030 of the present application as filed. For example, MOSFET M1 and M2 may be used in GPIO control circuits, GPIO polarity inversion circuits, and switch circuits for other LEDs. Resistors R1 and R2 may be used as pull up and pull-down resistors of various strapping circuits, termination resistors, current limiting circuits for GPIO, and pull up resistors for open drain GPIOs. Although the components such as the GPIO control circuits, GPIO polarity inversion circuits, switch circuits for other LEDs, pull up and pull-down resistors of various strapping circuits, termination resistors, current limiting circuits for GPIO, and pull up resistors for open drain GPIOs are not listed in the specification as filed, the specification as filed clearly states that materials M1, M2, R1, and R2 (i.e., the first set of materials) are currently used in other components of storage device 104.’
However, Maya teaches or suggests that its transistors (Q1 and Q2) are used in at least one other component in the storage device. For example, at least one other component can be the first set of materials and at least one of R3/R4/D3 when a first current limit resistor is R1 and a second current limit resistor is R2. As can be seen from fig. 2/5, at least one of other two resistors (beside the matched first current limit resistor and the second current limit resistor) and a diode (D3 fig. 2/D1 fig. 5) can be the at least one other component. In addition, none of the specification and drawing figures point out what the at least one other component is. The first set of materials are capable of being used in at least one other component. For example: similarly, as in the applicant’s argument, the first set of materials (Q1, Q2 fig. 2/ X1, X2 fig. 5) may be used in GPIO control circuits, GPIO polarity inversion circuits, and switch circuits for other LEDs.
Furthermore, the specification does not indicate fig. 2/fig. 3 as a prior art or as a conventional art. Also, the specification only indicates the first materials in fig. 4/5 can be used in at least one other component. Assuming arguendo, if the same indication were applied to fig. 2/3 and one having ordinary skills in the art would have taken the words because no other explanation about the at least one other component was given.
.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICK C CHEN whose telephone number is (571)270-7207. The examiner can normally be reached M-F Flexible 8:00-16:30.
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/PATRICK C CHEN/Primary Examiner, Art Unit 2842