DETAILED ACTION
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraphs, columns and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Election/Restrictions
Applicant’s election without traverse of species B/figs. 4-5, reflected in claims 1-20 in the reply filed on 07/06/2026 is acknowledged.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore elements, the first metal layer, the second metal layer, and the first transparent conductive layer are arranged on one side of the first substrate sequentially, must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Figs. 1 and 4 show these three elements (the first metal layer, the second metal layer, and the first transparent conductive layer), but no sequence of placement is shown.
The drawings are objected again to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: 50 (applicant’s specification [0024] - ¶ [0026] etc.).
Applicant’s drawings (fig. 1 and 4) include two markings 40 and 41. But from the drawings, this is NOT clear which two elements in the drawings are marked by 40 and 41.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claims 1 and 10 recite, “wherein the first metal layer, the second metal layer, and the first transparent conductive layer are arranged on one side of the first substrate sequentially”. This is not clear what sequence maintained here among these three elements. The drawings also do not show any sequence or order among the positions of these elements.
Claims 1 and 10 recite, “a second pixel electrode branch insulated from the first pixel electrode branch by a corresponding one of the metal common electrodes”. The cited three elements in this claim limitation, ‘first pixel electrode branch’, ‘second pixel electrode branch’ and ‘the metal common electrodes’ are conductive. This is not clear how a conductive layer (the metal common electrodes) insulate two other conductive elements (first and second pixel electrode branches) from each other. Insulation/isolation is done by dielectric/insulating layer in electrical devices. For examination, the limitataion will be considered as: a second pixel electrode branch separated from the first pixel electrode branch by a corresponding one of the metal common electrodes
Claims 1 and 10 recite, “wherein each of the plurality of TFTs comprises a pair of drains, and in the extension direction of the corresponding one of the data lines, the first pixel electrode branch and the second pixel electrode branch, which are located in different pixel regions and which are adjacent to each other, are respectively connected to different drains of the same one of the plurality of TFTs”. This is not understood how a single transistor can have two drains. For examination, the limitataion will be considered as, “wherein a same drain Claims 2-3, 13-14 also have similar issues.
As claims 2-9 and 11-20 depend on the above rejected base claims, they are also being rejected on the same reason.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6, 9-10, 13-15, 17 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by TSENG et al. (US 20110149224 A1, hereinafter Tseng’224).
Regarding independent claim 1, Tseng’224 teaches, “An array substrate (fig. 1-9; ¶ [0001] - ¶ [0045]), comprising:
a first substrate (20, fig. 2A-2B);
a first metal layer, a second metal layer, and a first transparent conductive layer, wherein the first metal layer, the second metal layer, and the first transparent conductive layer are arranged on one side of the first substrate sequentially, wherein the first metal layer is configured to form metal common electrodes (COM(x) and COM(x+1), fig. 1A) and scan lines (GL(x) and GL(x+1)), the second metal layer is configured to form data lines (DL(y) and DL(y+1)) and drains of a plurality of TFTs (thin film transistor) (Ta/Tc), the first transparent conductive layer is configured to form a common electrode layer (COM(x) and COM(x+1)), and
the data lines (DL(y) and DL(y+1)) are crossed with the scan lines (GL(x) and GL(x+1)) to define a plurality of pixel regions (¶ [0029]), wherein each of the plurality of pixel regions comprises a pixel; and
a second transparent conductive layer, configured to form a pixel common electrode (PX1, PX2) of the pixel;
wherein the pixel common electrode comprises a plurality of pixel electrode branches (PX1, PX2), each of the plurality of pixel electrode branches (12) extends along an extension direction of a corresponding one of the data lines (DL(y) and DL(y+1));
each metal common electrode (COM(x) and COM(x+1)) is arranged between two adjacent of the scan lines (GL(x) and GL(x+1)), and the plurality of pixel electrode branches in a corresponding one of the pixel regions are divided into a first pixel electrode branch and a second pixel electrode branch separated from the first pixel electrode branch by a corresponding one of the metal common electrodes (COM(x) and COM(x+1));
wherein a same drain
Regarding independent claim 10, Tseng’224 teaches, “An display panel (fig. 1-9; ¶ [0001] - ¶ [0045]), comprising:
an array substrate, comprising:
a first substrate (20, fig. 2A-2B);
a first metal layer, a second metal layer, and a first transparent conductive layer, wherein the first metal layer, the second metal layer, and the first transparent conductive layer are arranged on one side of the first substrate sequentially, wherein the first metal layer is configured to form metal common electrodes (COM(x) and COM(x+1), fig. 1A) and scan lines (GL(x) and GL(x+1)), the second metal layer is configured to form data lines (DL(y) and DL(y+1)) and drains of a plurality of TFTs (thin film transistor) (Ta/Tc), the first transparent conductive layer is configured to form a common electrode layer (COM(x) and COM(x+1)), and
the data lines (DL(y) and DL(y+1)) are crossed with the scan lines (GL(x) and GL(x+1)) to define a plurality of pixel regions (¶ [0029]), wherein each of the plurality of pixel regions comprises a pixel; and
a second transparent conductive layer, configured to form a pixel common electrode (PX1, PX2) of the pixel;
wherein the pixel common electrode comprises a plurality of pixel electrode branches (PX1, PX2), each of the plurality of pixel electrode branches (12) extends along an extension direction of a corresponding one of the data lines (DL(y) and DL(y+1));
each metal common electrode (COM(x) and COM(x+1)) is arranged between two adjacent of the scan lines (GL(x) and GL(x+1)), and the plurality of pixel electrode branches in a corresponding one of the pixel regions are divided into a first pixel electrode branch and a second pixel electrode branch separated from the first pixel electrode branch by a corresponding one of the metal common electrodes (COM(x) and COM(x+1));
wherein a same drain
a color film substrate (30), arranged opposite to the array substrate; and
a liquid crystal layer (LC), arranged between the array substrate and the color film substrate”.
Regarding claims 2 and 13, Tseng’224 further teaches, “The array substrate according to claim 1, wherein for the first pixel electrode branch and the second pixel electrode branch located in different pixel regions and adjacent to each other, an end of the first pixel electrode branch close to a corresponding one of the scan lines is connected to one of the drains of a corresponding one of the TFTs, and an end of the second pixel electrode branch close to the corresponding one of the scan lines is connected to the other of the drains of the corresponding one of the TFTs (fig. 1A, PX1 and PX2 are connected to the TFTs Ta and Tc).
Regarding claims 3 and 14, Tseng’224 further teaches, “The array substrate according to claim 2, wherein each of the plurality of TFTs (Ta/Tc) is disposed on an intersection of the scan lines (GL(x) and GL(x+1)) and the data lines (DL(y) and DL(y+1)) and disposed in the corresponding one of the plurality of pixel regions; and wherein each of the plurality of TFTs comprises a first drain and a second drain, the first drain is connected to the first pixel electrode branch (PX1) located in one of the pixel regions, and the second drain extends across the corresponding one of the scan lines (GL(x)) and is connected to the second pixel electrode branch located in another one of the pixel regions and adjacent to the first pixel electrode branch”.
Regarding claims 4 and 15, Tseng’224 further teaches, “The array substrate according to claim 1, wherein an orientation direction of the first pixel electrode branch (PX1, fig. 1A) is the same as that of the second pixel electrode branch (PX2); or for the first pixel electrode branch and the second pixel electrode branch located in different pixel regions and adjacent to each other in the extension direction of the corresponding one of the data lines, the orientation direction of the first pixel electrode branch is different from that of the second pixel electrode branch, and the first pixel electrode branch and the second pixel electrode branch are symmetrically arranged along an extension direction of a corresponding one of the scan lines”.
Regarding claims 6 and 17, Tseng’224 further teaches, “The array substrate according to claim 1, wherein in the extension direction of the corresponding one of the data lines, a color of the pixel in one of the pixel regions is the same as a color of the pixel in an adjacent one of the pixel regions (fig. 1A)”.
Regarding claims 9 and 20, Tseng’224 further teaches, “The array substrate according to claim 1, wherein each of the plurality of pixel regions is divided into a first area and a second area by the corresponding one of the metal common electrodes; and wherein for each of the plurality of pixel regions, the first pixel electrode branch is located in the first area, and the second pixel electrode branch is located in the second area”.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Tseng’224 as applied to claim 1 above, and further in view of Wu et al. (US 20170003559 A1, hereinafter Wu’559).
Regarding claims 5 and 16, Tseng’224 teaches all the limitations described in claim 1 and 10.
But Tseng’224 is silent upon the provision of wherein the pixel common electrode further comprises a plurality of pixel electrode stems; and each of the plurality of pixel electrode stems is arranged along an extension direction of a corresponding one of the scan lines, and connected to an end of a corresponding one of the plurality of pixel electrode branches close to the corresponding one of the scan lines.
However, Wu’559 teaches a similar device (fig. 6), wherein the pixel common electrode further comprises a plurality of pixel electrode stems (274, 275); and each of the plurality of pixel electrode stems is arranged along an extension direction of a corresponding one of the scan lines (22), and connected to an end of a corresponding one of the plurality of pixel electrode branches close to the corresponding one of the scan lines (22)”.
Tseng’224 and Wu’559 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Tseng’224 with the features of Wu’559 because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to combine the teachings of Tseng’224 and Wu’559 to include stems in the pixel electrodes according to the teachings of Wu’559 with a motivation of alleviating trace mura phenomenon (recovery time for short). See Wu’559, ¶ [0073] - ¶ [0048].
Claims 7 and 18 are rejected under 35 U.S.C. 103 as being unpatentable being over Tseng’224 as applied to claim 1/10 above, and further in view of Huang et al. (US 2018/0217706).
Regarding Claims 7 and 18, Tseng’224 teaches all the limitations described in claim 1 and 10.
Tseng’224 further teaches, wherein the second transparent conductive layer (PX1, PX2, fig. 2A-2B) is arranged on one side of the first transparent conductive layer (COM) away from the first substrate (20).
But Tseng’224 is silent upon the provision of wherein the TFTs are oxide TFTs
However, Huang et al. teaches, the TFTs are oxide TFTs (oxide semiconductor transistor) (¶ [0038]).
It would have been obvious to one of ordinary skill in the art to modify Tseng’224’s invention with Huang's structure in order to provide reduced costs, as taught by Huang [0048].
Claims 8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Tseng’224 as applied to claim 1/10 above, and further in view of Woo et al. (US 20100182522 A1, hereinafter Woo’522).
Regarding Claims 8 and 19, Tseng’224 teaches all the limitations described in claim 1 and 10.
But Tseng’224 is silent upon the provision of wherein the first transparent conductive layer and the second transparent conductive layer comprise or are made of a tin oxide
However, Woo’522 teaches a similar device, wherein the first transparent conductive layer and the second transparent conductive layer comprise or are made of a tin oxide (¶ [0260]).
Tseng’224 and Woo’522 are analogous art because they both are directed to semiconductor devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Tseng’224 with the features of Woo’522 because they are from the same field of endeavor.
It would have been obvious to one having ordinary skill in the art before the effective filling date of the invention to select tin oxide when forming a first and second transparent conductive layers, since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claims 11, 12 are rejected under 35 U.S.C. 103 as being unpatentable being over Tseng’224 as applied to claim 10 above, and further in view of Hebiguchi (US Pat. 6091473).
Claim 11, 12:
Hebiguchi teaches
Claim 11: (Fig. 2) the color film substrate 40 comprises a second substrate 40, a color resistance layer 72 (color filter), and a light shielding layer 71, wherein the color resistance layer 72 and the light shielding layer 71 are arranged on one side (lower side) of the second substrate 40 close to the array substrate 41, the color resistance layer 72 (color filter) corresponds to the pixel (color of red (R), green (G) and blue (B) of the color filter is arranged every pixel area 52) [Col. 7, lines 11-17]; the light shielding layer 71 is arranged on a side (between) of the color resistance layer 72 (color filters R/G/B), a projection of the light shielding layer 71 on the first substrate covers the corresponding one of the metal common electrodes (black matrix 71 covers a part which does not contribute to display of each pixel area 52, for example the gate wiring 50, the common electrode wiring 55, etc.)
It would have been obvious to one of ordinary skill in the art to modify Tseng’224's invention with Hebiguchi's structure in order to provide improved numerical aperture and wide angle, as taught by Hebiguchi [Abstract].
Hebiguchi teaches
Claim 12: (Fig. 2) wherein the color resistance layer comprises a first color resistance 71 (left side) and a second color resistance 71 (right side) - (color of red (R), green (G) and blue (B) of the color filter is arranged every pixel area 52) [Col. 7, lines 11-17]; and the light shielding layer 72 is disposed between the first color resistance and the second color
resistance (71/71).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD M HOQUE whose telephone number is (571)272-6266 and email address is mohammad.hoque@uspto.gov. The examiner can normally be reached 9AM-7PM EST.
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/MOHAMMAD M HOQUE/Primary Examiner, Art Unit 2817
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