Office Action Predictor
Last updated: April 16, 2026
Application No. 18/643,279

WIRING SUBSTRATE

Non-Final OA §103
Filed
Apr 23, 2024
Examiner
NORRIS, JEREMY C
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Ibiden Co., LTD.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
840 granted / 973 resolved
+18.3% vs TC avg
Minimal +3% lift
Without
With
+2.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
23 currently pending
Career history
996
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
40.6%
+0.6% vs TC avg
§102
53.2%
+13.2% vs TC avg
§112
4.6%
-35.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 973 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2025/0386433 A1 (Yugawa) in view of US 2025/0294674 A1 (Li) Yugawa discloses a wiring substrate (1), comprising: a first build-up part comprising an insulating layer (11) and a conductor layer (12, figure 1); and a second build-up part laminated on the first build-up part and comprising an insulating layer (13) and a conductor layer (12, [0029]), wherein the insulating layer in the first build-up part includes resin and inorganic particles comprising first inorganic particles (14a) partially embedded in the resin and second inorganic particles (14) completely embedded in the resin such that the first inorganic particles have first portions protruding from the resin and second portions embedded in the resin, respectively, and the first build-up part is formed such that the insulating layer has a surface covered by the conductor layer and including a surface of the resin and exposed surfaces of the first portions exposed from the resin (figure 2). Yugawa does not specifically state tha a minimum width of wirings in the conductor layer of the first build-up part is smaller than a minimum width of wirings in the conductor layer of the second build-up part and that a minimum inter-wiring distance of the wirings in the conductor layer of the first build-up part is smaller than a minimum inter-wiring distance of the wirings in the conductor layer of the second build-up part. However, such an arrangement is well known in the art as evidenced by Lin ([0066]). Therefore, it would have been obvious to one of ordinary skill in the art us incorporate the claimed features into the invention fo Yugawa as is known in the art and evidneced by Li. The motivation for doing so would have been to have a fine wiring section (Li [0066]). Additionally, a change in size of existing parts of a device has been held to be within the skill of the ordinary artisan (MPEP 2144). Additionally, the modified invention of Yugawa, wherein the first build-up part is formed such that the minimum width of the wirings in the conductor layer is 3 μm or less and that the minimum inter-wiring distance of the wirings in the conductor layer is 3 μm or less (Li [0066]) [claim 2], wherein the first build-up part is formed such that an aspect ratio of the wirings in the conductor layer is in a range of 2.0 to 4.0 (Li [0066]) [claim 3], wherein the first build-up part is formed such that the conductor layer has a polished surface (Yugawa figure 2) [claim 4], further comprising: a third build-up part (11a) laminated on the second build-up part on an opposite side with respect to the first build-up part and comprising an insulating layer, a conductor layer, and a via conductor (Yugawa figure 1) [claim 5], wherein the third build-up part is formed such that the insulating layer includes a core material (Yugawa [0014]) [claim 6], wherein the core material is a glass fiber [claim 7], wherein the first build-up part has a component mounting surface configured to mount a component (Yugawa [0043]) [claim 8], wherein the first build-up part is formed such that a ratio of a volume of the first portions to a volume of the first inorganic particles is larger than 0 and equal to or less than 0.4 (Yugawa [0016]-[0017] [claim 9], wherein the first build-up part includes a via conductor (Yugawa 12V, [0023]) formed in an opening penetrating through the insulating layer, the inorganic particles include third inorganic particles having flat parts and forming an inner wall surface of the opening such that the inner wall surface includes flat parts of the third inorganic particles and the resin [claim 11], wherein each of the third inorganic particles has a spherical segment shape [claim 13], wherein the first build-up part includes a via conductor (12V) penetrating though the insulating layer of the first build-up part such that the conductor layer and the via conductor include a seed layer and an electrolytic plating film layer formed on a surface of the seed layer and that the seed layer has a thickness of less than 0.5 μm (Yugawa [0022]) [claim 14], wherein the first build-up part is formed such that the conductor layer includes a seed layer and an electrolytic plating film layer formed on a surface of the seed layer and that the seed layer is a sputtering film (Yugawa [0022]) [claim 16], wherein the first build-up part is formed such that an aspect ratio of the wirings in the conductor layer is in a range of 2.0 to 4.0 (Li [0066]) [claim 17], wherein the first build-up part is formed such that the conductor layer has a polished surface (Yugawa figure 2) [claim 18], further comprising: a third build-up part laminated on the second build-up part on an opposite side with respect to the first build-up part and comprising an insulating layer (11), a conductor layer (12), and a via conductor (12V, Yugawa, figure 1) [claim 19], wherein the third build-up part is formed such that the insulating layer includes a core material (Yugawa [0014]) [claim 20]. Regarding claim 10, the modified invention of Yugawa teaches the claimed invention as described above with respect to claim 1, except modified Yugawa does not specifically state that the first build-up part is formed such that an arithmetic mean roughness Ra of the surface of the insulating layer is less than 0.08 μm [claim 10]. However, Yugawa teaches that the claimed layer has a roughness ([0037]). it would have been obvious, to one having ordinary skill in the art, to use a roughness in the claimed range to improve the interlayer adhesion. Moreover, it has been held that finding the optimum or workable range to be within the skill of the ordinary artisan (MPEP 2144). Regarding claim 12, the modified invention of Yugawa teaches the claimed invention as described above with respect to claim 11 except modified Yugawa does not specifically state that the inner wall surface has an arithmetic mean roughness Ra of 1.0 μm or less [claim 12]. However, Yugawa teaches that the claimed layer has a roughness ([0037]). it would have been obvious, to one having ordinary skill in the art, to use a roughness in the claimed range to improve the interlayer adhesion. Moreover, it has been held that finding the optimum or workable range to be within the skill of the ordinary artisan (MPEP 2144). Regarding claim 15, the modified invention of Yugawa teaches the claimed invention as described above with respect to claim 1 except modified Yugawa does not specifically state that the first build-up part includes a via conductor penetrating through the insulating layer of the first build-up part such that the via conductor has a shape that is reduced in diameter away from the second build-up part [claim 15]. However, such a modification would just be an inverse of the vias shown in Yugawa (figure 1). Such a change of shape has been held to be within the skill of the ordinary artisan (MPEP 2144). Therefore, it would have been obvious, to one having ordinary skill in the art, to use the claimed features in the modified invention of Yugawa. The motivation for doing so would have been impact the characteristic impedance. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JEREMY C NORRIS whose telephone number is (571)272-1932. The examiner can normally be reached 7:15-15:15 M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571)272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. JEREMY C. NORRIS Examiner Art Unit 2847 /JEREMY C NORRIS/Primary Examiner, Art Unit 2847
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Prosecution Timeline

Apr 23, 2024
Application Filed
Jan 08, 2026
Non-Final Rejection — §103
Apr 01, 2026
Response Filed

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604416
LAMINATE FOR WIRING BOARD
2y 5m to grant Granted Apr 14, 2026
Patent 12598703
WIRING CIRCUIT BOARD
2y 5m to grant Granted Apr 07, 2026
Patent 12598698
WIRING CIRCUIT BOARD
2y 5m to grant Granted Apr 07, 2026
Patent 12598693
THICK FILM PRINTED COOLER FOR IMPROVED THERMAL MANAGEMENT OF DIRECT BONDED POWER DEVICES
2y 5m to grant Granted Apr 07, 2026
Patent 12593395
WIRING BOARD AND METHOD FOR MANUFACTURING WIRING BOARD
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+2.6%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 973 resolved cases by this examiner. Grant probability derived from career allow rate.

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