Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election of Invention IV (Claims 1, 10 and 13) without traverse in the reply filed on 8/20/26 is acknowledged.
Claims 2-9, 11, 12, 14, and 15 (Inventions I, II, III, V, and VI) are withdrawn from further consideration.
DETAILED ACTION
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1, 10, and 13 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Specifically, representative Claim 1 recites:
“An integrated circuit fabrication chamber, comprising: a radio frequency (RF) signal generator configured to couple an RF signal to the integrated circuit fabrication chamber; a first sensor configured to sense voltage of the RF signal; a second sensor configured to sense current conducted via the RF signal; one or more analog-to-digital converters coupled to an output port of the first sensor and to an output port of the second sensor, the one or more analog-to-digital converters configured to convert sensed voltages and currents to digital representations of an instantaneous voltage and an instantaneous current; and one or more processors configured to transform the digital representations to frequency domain representations of a complex voltage of the RF signal and to transform the digital representations to frequency domain representations of a complex current conducted via the RF signal, the one or more processors additionally configured to combine the complex voltage of the RF signal and the complex current of the RF signal.”
The claim limitations in the abstract idea have been highlighted in bold above; the remaining limitations are “additional elements”.
Under the Step 1 of the eligibility analysis, we determine whether the claims are to a statutory category by considering whether the claimed subject matter falls within the four statutory categories of patentable subject matter identified by 35 U.S.C. 101: Process, machine, manufacture, or composition of matter. The above claim is considered to be in a statutory category (process).
Under Step 2A, Prong One, we consider whether the claim recites a judicial exception (abstract idea). In the above claim, the highlighted portion constitutes an abstract idea because, under a broadest reasonable interpretation, it recites limitations that fall into/recite an abstract idea exceptions. Specifically, under the 2019 Revised Patent Subject matter Eligibility Guidance, it falls into the groupings of subject matter that covers mathematical concepts - mathematical relationships, mathematical formulas or equations, mathematical calculations.
Next, under Step 2A, Prong Two, we consider whether the above claim that recites a judicial exception is integrated into a practical application.
The above claims comprise the following additional elements:
In Claim 1: An integrated circuit fabrication chamber, comprising: a radio frequency (RF) signal generator configured to couple an RF signal to the integrated circuit fabrication chamber; a first sensor configured to sense voltage of the RF signal; a second sensor configured to sense current conducted via the RF signal; one or more analog-to-digital converters coupled to an output port of the first sensor and to an output port of the second sensor, the one or more analog-to-digital converters; the one or more processors.
The additional elements in the preambles are recited in generality and represent insignificant extra-solution activity (field-of-use limitations) that is not meaningful to indicate a practical application.
The additional elements in the claims such as the a radio frequency (RF) signal generator configured to couple an RF signal to the integrated circuit fabrication chamber, one or more processors, and analog-to-digital converters coupled to an output port are examples of computer/electronic equipment (components) that are generally recited and not meaningful and, therefore, are not qualified as particular machines to indicate a practical application. The limitations that generically recite sensors configured to sense voltage and current of RF signal represent insignificant extra-solution activity of mere data gathering. According to the October update on 2019 SME Guidance such steps are “performed in order to gather data for the mental analysis step and is a necessary precursor for all uses of the recited exception. It is thus extra-solution activity and does not integrate the judicial exception into a practical application”.
Therefore, the claims are directed to a judicial exception and require further analysis under the Step 2B.
However, the above claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception (Step 2B analysis) because these additional elements/steps are well-understood and conventional in the relevant art based on the prior art of record.
The independent claims, therefore, are not patent eligible.
With regards to the dependent claims, claims 10 and 13 provide additional features/steps which are part of an expanded abstract idea of the independent claims (additionally comprising abstract idea steps) and, therefore, these claims are not eligible without meaningful additional elements that reflect a practical application and/or additional elements that qualify for significantly more for substantially similar reasons as discussed with regards to Claim 1.
The additional elements in Claims 10 and 13 further narrow the abstract idea by forming RMS values and using successive-approximation algorithm in ADC.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Van Zyl GIdeon et al. (US 20160113103), hereinafter ‘Gideon’ in view of Arthur M. Howald et al. (US 20160322207), hereinafter ‘Howald’.
With regards to Claim 1, Gideon discloses
An integrated circuit fabrication chamber (Plasma Chamber 108, Fig.1: For the purposes of this disclosure, a “circuit” can include any combination of electrical components that generate an output signal based on an input signal [0049]; The plasma 106 is generally used to process a work piece or substrate (not shown) but is well known to those skilled in the art [0060]) , comprising:
a radio frequency (RF) signal generator configured to couple an RF signal to the integrated circuit fabrication chamber (The power generation system 100 is configured to provide radio frequency (RF) power to the plasma 106 [0059]; The power generation system 100 is configured to provide RF power (e.g., an RF voltage) at a sufficient level to ignite and sustain a plasma 106 that is contained in the plasma chamber 108 [0060]);
a first sensor configured to sense voltage of the RF signal; a second sensor configured to sense current conducted via the RF signal (The sensor 112 can be a directional coupler, current-voltage sensor or other multi-port network and can monitor current and voltage or combinations of voltage and current (e.g. incident and reflected signals) between the power source 110 and matching network 104 or between the matching network 104 and the plasma chamber 108 [0064]);
one or more analog-to-digital converters coupled to an output port of the first sensor and to an output port of the second sensor, the one or more analog-to-digital converters configured to convert sensed voltages and currents to digital representations of an instantaneous voltage and an instantaneous current (FIG. 17 shows three exemplary implementations of the sensor e.g. sensor 112 or 412 … either implementation can include a filter 1730 and analog to digital converter 1720 as shown FIG. 17C [0112]);
and one or more processors (Circuits 114, Fig.1) configured to transform the digital representations to frequency domain representations of a voltage of the RF signal and to transform the digital representations to frequency domain representations of a current conducted via the RF signal (The processing of the information can be done in a number of ways, from simply analyzing the time series of measurements from the sensor and performing higher order statistics on the time series to using dedicated receivers tuned to the mixing and intermodulation product frequencies to extract the amplitude and phase relationships to using any number of mathematical transformations including but not limited to the discrete Fourier transform [0063]; As noted before this is just one implementation and many other implementations using, for example, e.g., the discrete Fourier transform rather than dedicated demodulation channels are possible [0113]),
the one or more processors additionally configured to combine the voltage of the RF signal and the current of the RF signal (The signals 1820 (labeled A) and 1830 (labeled B) can, for example, be forward and reflected power or voltage and current or some other measurement of interest [0113]; Fig. 17B).
However, Gideon does not specifically disclose a complex voltage and complex current of the RF signal.
Howald discloses a complex voltage and complex current of the RF signal (The RF generator 1002 includes an RF power supply 1010 and a sensor 1012, e.g., a complex voltage and current sensor, a complex impedance sensor, a complex voltage sensor, a complex current sensor, etc. [0117]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gideon in view of Howald to transform the digital representations to frequency domain representations of a complex voltage of the RF signal and to transform the digital representations to frequency domain representations of a complex current conducted via the RF signal as known in the art (Howald) and, correspondingly combine the complex voltage and the complex current of the RF signal for a circuit analysis.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over V Gideon in view of Howald, in further view of John C. Valcore Jr. (US 20140214350), hereinafter ‘Valcore’.
Gideon is silent on wherein the complex voltage and the complex current are combined to form root mean square (RMS) voltage and RMS current.
Valcore discloses the complex voltage and the complex current are combined to form root mean square (RMS) voltage and RMS current [0139].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gideon in view of Howald, and Valcore that the complex voltage and the complex current are combined to form root mean square (RMS) voltage and RMS current as known in the art.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over V Gideon in view of Howald, in further view of Gerald R. Stanley (US 20070153780), hereinafter ‘Stanley’.
Gideon is silent on the one or more analog-to-digital converters are configured to apply a successive-approximation technique.
Stanley discloses the one or more analog-to-digital converters are configured to apply a successive-approximation technique [0042].
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Gideon in view of Howald, and Stanley Valcore to apply in the one or more analog-to-digital converters a successive-approximation technique.as known in the art.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claims 1-15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-15 of U.S. Patent No. 11994542. Although the claims at issue are not identical, they are not patentably distinct from each other because it appears that independent claims 1 and 14 of US Patent No. 11994542 are claims which are narrower than the instant independent claim 1. Therefore, they disclose the features of the latter claim. The instant application’s dependent claims 2-15 are also disclosed by relevant claims of U.S. Patent No. 11994542.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Edvard Csanyi, “What is the complex power and how it figures in power analysis”, Electric Lectures/Energy and Power, March 17, 2017, https://electrical-engineering-portal.com/complex-power-analysis discloses complex power calculation procedure using voltage and current.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER SATANOVSKY whose telephone number is (571)270-5819. The examiner can normally be reached on M-F: 9 am-5 pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Catherine Rastovski can be reached on (571) 270-0349. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALEXANDER SATANOVSKY/
Primary Examiner, Art Unit 2857
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